[sdiy] 4069 VCO linearity SUCCESS

[René Schmitz]

Hey Scott!

>I got it working to 6 octaves:
>
>0.074
>0.147
>0.296
>0.593
>1.191
>2.390
>4.869
>
>Are the voltage readings I took while doing the period
>halving test.

Congrats! 

Goes flat, but if the compensation is missing that is to 
be expected.

>One thing additional I had done that made things worse:
>At one point, I had gotten it sort of working, but it
>was oscillating at such a low freq that I (not thinking
>that something was WRONG) subbed the 2.2 nF cap for 
>a 150 pF.  I grabbed a 3.3 nF and that seemed to fix
>the nonlinear ramp.  I see the smallest of nonlinearity
>at the very start of the ramp.  The 3.3 nF is also much
>more compatible with the range of human hearing (c:

I now checked again, and I think I know whats causing this: 
Its the nonlinear behaviour of these cmos "opamps" it self. 
I hadn't noticed until now, a slight departure from linear ramp.
But my prototype tracks well nonetheless. How can that be?!
I think that is because the voltage difference over the cap 
is still a linear ramp. The voltage at the input is also 
changing a bit, but in the opposite direction. No surprise 
actually, we have to face a relatively low loop gain here, 
and since the input has such a high impedance, the current 
can't go somewhere else than into the cap, so the voltage in 
the cap must be linear.

>The last measurement is a little off, but that might be
>because I had removed the 'high end' compensation
>resistor/diode.  I'll put that back in and see if I can 
>squeeze another octave out of it.  

Maybe you will find that a slightly lower value is necessary, 
since the value actually compensates for the reset time 
_and_ the expo mistracking (Rbe), the latter is not existant 
in your circuit of course.

>Over about 5.3 volts 
>of CV the VCO stops oscillating.  No big deal, I can use
>whatever linear portion I get and shift the freq around
>by selecting an appropriate cap.

Not necessary IMO, the the current sink that you devised 
doesn't really sink to GND. So when your CV is high enough, 
at some point the current can't flow out of the integrator 
anymore, because the emitters of your transistors are higher 
than the "opamps" input. (Scientifically: the current sink 
saturates.) Thats why it stops.

I'd recommend going back to your initial setup, with the emitters 
going to the -input, base to out and +input grounded. The emitters 
will be at GND due to the feedback. All you need to make it work 
right is to add an inverting stage at the input.

Cheers,
 René
-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159