[sdiy] Re: Daffy CMOS ASCIImatic

[René Schmitz]

At 09:52 29.04.02, Scott Gravenhorst wrote:
>Ok, then it looks like a lot depends on the nature of the load.
>I'm starting to think that my end purpose idea is a waste of
>time.  That being: use an opamp to scale and buffer an input 
>signal.  The output of the opamp goes to one end of the parallel
>complementary MOSFETs.  The other side of the transistor pair 
>goes to a capacitor to ground.  The output of the circuit is 
>point where the cap meets the transistors.  Would this function
>as a VC LPF?  Am I foolishly thinking this could work like one 
>of the stages of an OTA based VC-SVF?

I'd use invertors as integrators. The problem with a cap to GND is 
that as the voltage over the cap changes, it changes the gate to 
source voltage.

I've uploaded a small circuit I did some time ago, where I used the 
MOSFETs (albeit just the n-channel) of a 4007 for a filter. I think 
one can even replace the opamps by invertors, by shifting the GND potential 
to Ub/2 (or by using symmetric power for the CMOS).

http://www.uni-bonn.de/~uzs159/temp/vcf4007_s.gif

It has linearisation for the "resistor", and I could use levels ~200mV.

Cheers,
 René


-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159