[sdiy] Phasors FET vs OTA?

[Osamu (Sam) HOSHUYAMA]

Hello Jay,

The following two schematics may help you.

Linearization of control characteristic of FETs (Mike Irwin's VCR using
CD4049UB):

    http://www5b.biglobe.ne.jp/~houshu/synth/mike_irwin/cmos-vcr.gif

Mike built a 10 stage phaser using 2 4049's.


Linearization of d-s resistance to reduce distortion:

    http://www5b.biglobe.ne.jp/~houshu/synth/PhaseFet0205.GIF

Best,

Sam Hoshuyama

harry wrote:
> 
> It was Osamu Hoshuyama who posted the new j-fet linearization
> scheme.  VERY nice imho...
> 
> H^) harry
> 
> patchell wrote:
> 
> >     I don't think it matters how you use OTA's, voltage controlled resistors or
> > not, if they are controlling the signal characteristics, they will introduce
> > noise.
> >
> >     Some things you need to keep in mind about noise.  If you increase the
> > number of stages by 4, you only increase the amount of noise by 2, so adding
> > stages is not quite the big deal you may think (noise addes by the square root
> > sum of the squares, or something like that).  Also, the offset voltage on the
> > CA3280 is pretty good, you might be able to get away with quite a few stages
> > before you need offset trim.
> >
> >     Also, on FETs, you can improve the voltage control characteristic of the fet
> > by using feed back around the fet.  This also improves the distortion of the FET
> > Voltage controlled resistor as well (talking about J-FETs here).  In fact,
> > didn't somebody just post a bunch of schematics of experimental JFET VCResistors
> > just a little while ago?  I was impressed with some of the novel solutions.
> >
> > Jay Schwichtenberg wrote:
> >
> > > Howdy One and All,
> > >
> > > I've been thinking lately about doing some work with phasors, at least 6
> > > stages maybe more. In general I'm more into quiet vs freq tracking for this
> > > type of device. After doing some research it seems to me there are about 4
> > > different general architectures for phasor circuits. FET resistors, OTA all
> > > pass, transistor ladders (Arp Omni) and LDRs. I'll ignore LDRs and
> > > transistor ladders simply because of size (I'm into small and SMT) so that
> > > leaves FETs and OTAs. In my mind (believe me it's a scary place) there are
> > > issues with both. With a number of OTA stages I think there would be issues
> > > of noise (OTAs aren't the quietest parts) and offset unless diode biasing
> > > (LM13X00 & CA3280) and offset trim was used. Using the diodes wouldn't be a
> > > problem but by the time you 6 or more trim pots on a board you've sucked up
> > > a lot of space. Using a FET to ground at the op-amp input starts to seem
> > > better noise wise. The major problem that I can think of with the FETs is
> > > the control/freq range. A lot of FETs have a very small gate voltage for
> > > full off/on operation some in the order of 0.1-0.2 volts. You can find other
> > > FETs that are more in the volt range which might be better suited for this
> > > type of circuit. Some other ideas for discussion might be AC coupling stages
> > > and using OTAs as VC resistors like the FET but not directly in the audio
> > > path.
> > >
> > > I know that there are people out there that have some ideas and opinions.
> > >
> > > Thanks for the discussion everyone.
> > > Jay
> >
> > --
> >  -Jim
> > ------------------------------------------------
> > * Visit:http://www.silcom.com/~patchell/
> > *-----------------------------------------------
> > *I'm sure glad Merry Christmas comes just once a year
> > * -Yogi Yorgensen
> > ------------------------------------------------
> 
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-- - ---  - -- ------ - -------- -- - ---- -
Osamu (Sam) HOSHUYAMA      houshu at rogers.com
                              Ottawa, CANADA
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