[sdiy] Linear VC ADSR schematic

[Tim Ressel]

Yo,

Sharp eyes. You are correct, sir.

I'll fix it right away.

--tr

--- Yves USSON <Yves.Usson at imag.fr> wrote:
> Hi Tim
> 
> I've had a look to your VCADSR schemo, and I think
> there is a little 
> quirk with it.
> It seems that pin 6 and 7 of the 555 are not
> connected correctly. I think that
> pin 7 should be left unconnected (it's the discharge
> tranny) while 
> pin 6 (the threshold pin)
> should be connected to the output of the integrator
> stage (TL082).
> Furthermore, addind a single OPA stage (in a voltage
> follower
> configuration) at the output would improve buffering
> the ADSR signal.
> 
> Regards
> 
> 
> >To all,
> >
> >I have posted the schematic for the linear voltage
> >controlled ADSR gennie on my web site:
> >
> >http://home.attbi.com/~t.ressel/vcadsr.pdf
> >
> >It is based on a VC ADSR by Chris MacDonald. It
> takes
> >0-10V inputs and produces an envelope with linear
> >ramps. This is a work in progress and needs a bit
> of
> >tweaking.
> >
> >--tr
> >
> >
> >__________________________________________________
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> -- 
>
----------------------------------------------------------------------------------------------------------------------------
> Dr Yves USSON						ph. +33 476 549 410
> Equipe RFMQ, TIMC UMR5525 CNRS				fax. +33 476 549
> 549
> Institut Albert Bonniot, Domaine de la Merci
> 38706 La Tronche cedex, FRANCE
>   http://www-timc.imag.fr/rfmq/PAGES/Y-USSON/
> 


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