[sdiy] Filter problem

[Neil Johnson]

Roman,

> Ha! 3-pole state variable. Interesting.

Thanks!  It all stems from wanting to use the SSM2164 in a filter, and
with one gain cell doing VCQ that left three gain cells for the filter.
So I thought I'd see if I could use all three, and I like the challenge of
a state-variable design.  And I bought a book on analogue filter design
from a library sale, and it had some interesting theory....

> Have you considered using small NTC in series with control node of SSM,
> i.e. pins 3,6,11 to slightly improve temperature response?

I have thought about temp. compensation, and one place to do it would be
to compensate the gain of the control amp.  I might have a look at seeing
if I can replace R27 with a tempco, and what the result will be.

At the moment I can't justify to myself the extra complexity involved.
Its already going to be a squeeze to fit it into the board outline, and
anywhere I can shave off a component or two will be worth the time spent.

> I leave pin 1 of SSM open, i.e. R14='a lot'. According to one of
> datasheet graphs it has some parameter better with R14=1M. Can't
> remember if it was gain matching versus control voltage or something
> like that.

>From the datasheet there are four "optimals":

Parameter		Optimum Rbias
--------------------- 	-------------
Voltage Noise Density	   >400k
THD			   4-7k
Control Feedthrough	   550k
Supply Current		   >100k

So I guess if I'm prepared to sacrifice THD I can reduce noise, control
feedthrough and supply current.  Sadly, at 100k the THD hits 0.1%, and at
1M it is about 0.13%.  I haven't made up my mind yet, which is why it is
"TBD".

Neil

--
Neil Johnson :: Computer Laboratory :: University of Cambridge ::
http://www.njohnson.co.uk          http://www.cl.cam.ac.uk/~nej22
----  IEE Cambridge Branch: http://www.iee-cambridge.org.uk  ----