[sdiy] FPGA multiplier

[Magnus Danielson]

From: ASSI <Stromeko at compuserve.de>
Subject: Re: [sdiy] FPGA multiplier
Date: Sun, 7 Dec 2003 10:50:56 +0100
Message-ID: <03120710505609.00646 at Robert>

> On Saturday 06 December 2003 22:13, Kevin Downs wrote:
> > Yup, the Spartan 3's are very cool.... My company is doing a design
> > on one at the moment, and all those multipliers are wonderful! The
> > 3's also have a much more friendly ratio of RAM to logic cells than
> > the 2E's
> 
> ...but check out the voltage tolerance and driving capabilities of the 
> outputs. You may also need a LVDS<->TTL converter for each pin unless 
> all of your board can run from less than 2.5V.

Spartran 3's have LVDS mode. Modern FPGAs have support for loads of
IO-standards and these days you have something like 4 or 8 banks for which a
common IO-standard is being configured. LVDS, LVTTL and a huge number of others
is supported with really very little effort. Do read the datasheets.

You might want to spend some time on grouping your signals correctly to fit the
bank-borders, but usually that's not a too difficult task.

Cheers,
Magnus