programable analog threshold network: was RE: [sdiy] new project in the works

Czech Martin Martin.Czech at micronas.com
Mon Jun 2 13:49:22 CEST 2003


Hi Michael,
here is the proposed circuit in a (very rough)
schematic.

caveat: this is only a circuit idea. Depending on the
actual hardware, some precautions have to be made
for a working circuit. This is obvious for those
experienced in the art.

http://www.geocities.com/SoHo/Museum/4459/test.gif

On the left side you can see the input in.
A bias level can be added (or control voltage).
This goes into a discrete flash ADC with 5 comparators.
You can see the reference ladder, which is driven by Vref+ and
Vref-. The reference voltages are realized via pots,
could be fixed resistors as well. Pots and Vref+, Vref-
give complete control on where the input is quantized.
Note that uneven quantization is possible and that any
pot dial will give a unique characteristic (well, in theory,
you must not dial the pot to the extremes, otherwise
the steps will overlap. Additional resistors can take care
of that. Hysteresis is left away, perhaps the comparators
should have some feedback from output to +).

Note: by variation of Vref+ and/or Vref- the signal moves
relative to the steps, or vice versa. This has exactly the same
effect then using a costly multiplier on the input,
if the reference voltages behave in the right way.

I guess this circuit has less problems in terms of this scaling.
Of course you can vary individual thresholds, or vary only Vref-...
etc.


However, next comes a thermometer to 1 out of 5 priority decoder.
The box below shows the operation for a 1 out of 3, you see how it works.
Again, this is a basic schematic, the actual ICs you use may need
alterations or modifications.

Once we have the 1 out of N code, we can simply steer CMOS switches,
or other switching means (npn transistors can do similar things,
look at the usual tri to saw converters).
Of course, the generic CMOS switches can not deal with +-13V comparator
voltage, so some extra level shifting circuitry will be needed, depending
on the actual ICs.

The selected pot voltage will go to a summing amplifier, which is
bandwidth limited and output protected.
The lowpass characteristic may help to overcome glitch problems.

Glitches: as you can see, the priority decoder will perhaps spit out
intermediate "false" results, which can lead to trmporarily
wrong switching action. But I think this circuit has little problems.

This circuit will quantize an incomming signal (with arbitrary step
size and shape). The individual steps will in turn lead to
completely independent output steps (only limited by switch characteristics).
This goes very much further then any PWM or comparator scheme I have seen
so far (but perhaps this is already existing somewhere).


This circuit can be used in the audio range for spectra generation.
Some people say that these "Manhattan" functions do not sound -good.
I've got only little experience so far, but got some interesting
results (simulation and wave player).

Note that the same circuit can serve as sequencer.
The input then must be a low freq. saw or tri wave.
Trigger generation, step count limiting etc. is straight
forward.

In a certain way such a sequencer would be more suitable for an
analog system then the usuall counter/decoder types.
Of course, we have some drift/hold problem.

m.c.







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