[sdiy] why +/- 15V

[jhaible at debitel.net]

> > Bringing the level up (and down again) between filter stages
> > helps to avoid leakage thru parasitic capacitance.
> > 
> > Theoretically, You can go from one filter stage to the
> > next with 20mV signals.
> 
> The Moog filter is an example.

The Moog filter is a special case.
I look at it this way: The coupling between
stages isn't done with voltage at all -
it's done with current. Each pair of collectors
provides a differential current (+ bias current)
which could result in *any* voltage level, depending
on the load. This is then converted into a 
a voltage by means of the rE's of the next transistors,
and the capacitor across the differential path.
Both are rather low-impedance.

So the "big-resistor / small-resistor" divider
is there: The impedance of the (not perfect) 
current source of a collector output, and the
impedance of rE and C.

The remaining question is: That's the case with
an OTA driving a small resistor and the next OTA
(keeping below 20mV) as well.
So I can only speculate about this: If you build
a 20mV-OTA-unitity-gain-follower, you have 
capacitive coupling *across* a differential pair, 
right into the next stage. The Moog cascade, however,
is a cascode topology, which normally is famous for
_isolating_ stages and getting rid of capacitive
parasitics.

> But relatively large caps there, so the parasitics shouldn't matter.

... and this, too, of course.

JH.


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