[sdiy] why 10V
René Schmitz
uzs159 at uni-bonn.de
Mon Sep 22 00:43:50 CEST 2003
Hi Jürgen, Magnus, Don et al.,
> That's true. But I would still say the reason of my initial question was
> to _avoid_ clipping / nonlienar behaviour. (;->)
A matter of perspective!
> I thought the limit was one of causality, not linearity.
> For a perfect 90deg shift over all frequencies, you'd need to "see into
> the future". If you have a band limited signal (especially omitting
> the lowest frequencies), you can introduce a _delay_ for your signal,
> to compensate for this "looking into the future". The lower your
> frequency range, the more delay you would need. For DC, you would
> need infinite delay. (Just imagine what a 90deg phase shifted
> DC voltage would look like! - I'm certain Magnus could give
> the answer right away, without looking into the books. Hi Magnus!)
There is no doubt about that one can't realize the HT.
What I was aiming at is that any practical implementation will have
nonlinearities. Be it the output voltage range, the numerical resolution
of your DSP, uC or whatever.
The systems theory is based on the assumption that all processing
elements are linear. I.e. that f(c*x,t) = c*f(x,t). That is never the
case in practice.
Say if you have your cascade of N allpasses, and even when the output
should stay within the output range of your opamp with an applied
signal, that doesn't say anything about the outputs of the opamps 1 to N-1.
> What looks like theory straight from the ivory tower (HT of DC) has
> a very practical conclusion in the real world: All these Frequency
> Shifters that offer two dome-filter-inputs instead of a local
> quadrature oscillator, will not be capable of very low amount
> of frequency shift. (No slow infinite phasing, for instance)
No argument here.
Cheers,
René
--
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159
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