[sdiy] complex logic problem
David Moylan
dave at westphila.net
Wed Aug 23 23:01:17 CEST 2006
If I recall Karnaugh maps get a bit out of hand as the number of inputs
gets larger. The problem is recognizing adjacent cells (cells that
differ by only one bit). I don't know how easy it is to do more than 3
or 4 bits in a Karnaugh map. They are handy for doing small logic
reductions.
It's just a table of input output relationships. It works like this
(for 2 bits)
x\y 0 1
--------
0 | 0 | 1 |
|----|---|
1 | 1 | 1 |
--------
This is a representation of an OR gate, but if you were working it out
you might be saying I want the output to be 1 when (X is 1 and Y is 0)
OR (X is 1 and 1 is 1) OR (X is 0 and Y is 1). To reduce you circle
adjacent 1's in each row or column. The groups you circle show
reductions. For instance, circle the bottom two 1's and you see this
represents X=1; there's no dependence on Y because the output is 1
whether Y is 0 or 1 in this row. You then circle the 1's in the column
on the write and see that's Y=1. Then all the groups are OR'd together
and the result is that the output is 1 when (X = 1) | (Y = 1) also
written as X | Y, the definition of an OR gate.
Dave
Scott Gravenhorst wrote:
> I think what you want is to generate a Karnaugh map, it's meant to minimize boolean
> expressions, from that you can generate simplified logic. Google "Karnaugh map"
> and get many many hits. I'll bet there's software, but I've never used such. I've
> done Karnaugh maps by hand, they work, they're logical, but it was years ago and I
> have CRS (Can't Remember Shit)...
>
>
> "Tavys Ashcroft" <tavys.ashcroft at gmail.com> wrote:
>> Hi all,
>>
>> I'm working on a sequencer design that is probably going to require at
>> least a small microcontroller or FPGA to take care of some logic. But
>> before I go that route, I want to lay out a big old truth table and
>> see if I can reduce my logic needs down to a realistic number of
>> gates. Perhaps I can get away with using a handfull of CMOS chips.
>>
>> Is there any software out there that would automate this process, or
>> at least assist? I'm hoping to just fill out a giant truth table and
>> have software give me possible combinations of gates that would create
>> the result I'm looking for. Does such a thing exist? If not, could
>> somebody point me to a good primer for doing this by hand? I've only
>> ever made digital logic circuits with a few gates before and this one
>> is getting bigger than I can visualize.
>>
>> Thanks,
>> Tavys
>>
>
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