From jpdesroc at oricom.ca  Fri Dec  1 15:36:44 2023
From: jpdesroc at oricom.ca (Jean-Pierre Desrochers)
Date: Fri, 1 Dec 2023 09:36:44 -0500
Subject: [sdiy] PCM1702 DAC fakes ? or not ??
In-Reply-To: <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
References: <000001d602ae$d42f19f0$7c8d4dd0$@oricom.ca>
 <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
Message-ID: <000001da2463$cf388140$6da983c0$@oricom.ca>

I?m working on a Yamaha Clavinova CVP900

That has its right channel dead.. no sound.
The left channel is ok.
So, looking at the attached PDF file from Yamaha,

They stated that a common issue was found on PCM1702 DAC?s used
on the main digital board. Noise or no sound at all can be encountered.

I checked both DAC and, effectively DAC IC29 had no sound
to its opamp (pin 7 on IC43).

The only ?I thought reliable? source to buy a PCM1702 I found
was Syntaur USA at $36.95 each.

To make sure I ordered two. Ok.

So I carefully removed the bad IC29 and soldered a new one.

The result ? Now both channels were dead !!

I thought I could have done something on the main board
while replacing the bad chip.. So I desoldered it and powered back the unit.

The left channel only came back alive? Hmmm?
So I picked the second DAC I had left on hand and soldered it
on the board.. Again both channels dead !!!

So 2 things could be happening.

New Fake PCM1702 IC?s that load the common data buses (QCLK, WCLK) when installed
and keep the good DAC from working.. ?

Or the driving IC that brings QCLK and WCLK to both DAC?s
that is getting weak and drop when 2 DAC?s are installed (That I doubt).
By the way I had no way to check digital waveforms on both DAC?s
beacause they are placed underneath a big daughter board.

 

So what do you think about that ?

Hmmm. 



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From mbryant at futurehorizons.com  Fri Dec  1 15:41:43 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 1 Dec 2023 14:41:43 +0000
Subject: [sdiy] PCM1702 DAC fakes ? or not ??
In-Reply-To: <000001da2463$cf388140$6da983c0$@oricom.ca>
References: <000001d602ae$d42f19f0$7c8d4dd0$@oricom.ca>
 <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
 <000001da2463$cf388140$6da983c0$@oricom.ca>
Message-ID: <CWLP265MB71320F5EC990DD95EACEF3ECDB81A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Not nice but unsolder the working DAC, put it to one side and then solder one of the new ones in the same space to check it works.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Jean-Pierre Desrochers <jpdesroc at oricom.ca>
Sent: 01 December 2023 14:36
To: 'SDIY List' <synth-diy at synth-diy.org>
Subject: [sdiy] PCM1702 DAC fakes ? or not ??


I?m working on a Yamaha Clavinova CVP900

That has its right channel dead.. no sound.
The left channel is ok.
So, looking at the attached PDF file from Yamaha,

They stated that a common issue was found on PCM1702 DAC?s used
on the main digital board. Noise or no sound at all can be encountered.

I checked both DAC and, effectively DAC IC29 had no sound
to its opamp (pin 7 on IC43).

The only ?I thought reliable? source to buy a PCM1702 I found
was Syntaur USA at $36.95 each.

To make sure I ordered two. Ok.

So I carefully removed the bad IC29 and soldered a new one.

The result ? Now both channels were dead !!

I thought I could have done something on the main board
while replacing the bad chip.. So I desoldered it and powered back the unit.

The left channel only came back alive? Hmmm?
So I picked the second DAC I had left on hand and soldered it
on the board.. Again both channels dead !!!

So 2 things could be happening.

New Fake PCM1702 IC?s that load the common data buses (QCLK, WCLK) when installed
and keep the good DAC from working.. ?

Or the driving IC that brings QCLK and WCLK to both DAC?s
that is getting weak and drop when 2 DAC?s are installed (That I doubt).
By the way I had no way to check digital waveforms on both DAC?s
beacause they are placed underneath a big daughter board.



So what do you think about that ?

Hmmm.

[cid:image002.jpg at 01DA2439.E56D1CC0]
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From modular at go2.pl  Fri Dec  1 16:05:45 2023
From: modular at go2.pl (Roman Sowa)
Date: Fri, 1 Dec 2023 16:05:45 +0100
Subject: [sdiy] PCM1702 DAC fakes ? or not ??
In-Reply-To: <000001da2463$cf388140$6da983c0$@oricom.ca>
References: <000001d602ae$d42f19f0$7c8d4dd0$@oricom.ca>
 <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
 <000001da2463$cf388140$6da983c0$@oricom.ca>
Message-ID: <649b9dd5-8c4a-63bd-d6d6-47611d0e0c39@go2.pl>

To be sure, check the IC43 opamp first. It is pretty easy if the DAC is 
desoldered, just wiggle a finger over empty DAC pads and there should be 
nasty brooming audible.
IMHO there's no other way now than to check the common lines. Without 
direct access you can solder pieces of wire to QCLK and WCLK traces, put 
PCBs back together and connect scope probes to those wires. To not 
desolder the DAC so many times (one more time and the pads will fall 
off), you may cut the traces on those lines close to the IC29, see the 
clock signals on the scope, then bridge those cuts and observe the clock 
signals again.
I would also check if supply voltages at DAC's pins are correct and if 
those 3 capacitors are not shorted or anything.

You might also consider making test jig for all those DACs you have just 
to see if they are OK. Incrementing data word on every sample would 
create nice ramp. I know you could write simple PIC program for this in 
20 minutes. Seems easy only if you have burn-in/test socket for SOIC20 
though.

Roman

W dniu 2023-12-01 o?15:36, Jean-Pierre Desrochers pisze:
> I?m working on a Yamaha Clavinova CVP900
> 
> That has its right channel dead.. no sound.
> The left channel is ok.
> So, looking at the *_attached PDF file from Yamaha_*,
> 
> They stated that a common issue was found on PCM1702 DAC?s used
> on the main digital board. Noise or no sound at all can be encountered.
> 
> I checked both DAC and, effectively DAC IC29 had no sound
> to its opamp (pin 7 on IC43).
> 
> The only ?I thought reliable? source to buy a PCM1702 I found
> was *Syntaur USA* at $36.95 each.
> 
> To make sure I ordered two. Ok.
> 
> So I carefully removed the bad IC29 and soldered a new one.
> 
> The result ? Now both channels were dead !!
> 
> I thought I could have done something on the main board
> while replacing the bad chip.. So I desoldered it and powered back the unit.
> 
> The left channel only came back alive? Hmmm?
> So I picked the second DAC I had left on hand and soldered it
> on the board.. Again both channels dead !!!
> 
> So 2 things could be happening.
> 
> New Fake PCM1702 IC?s that load the common data buses (QCLK, WCLK) when 
> installed
> and keep the good DAC from working.. ?
> 
> Or the driving IC that brings QCLK and WCLK to both DAC?s
> that is getting weak and drop when 2 DAC?s are installed (That I doubt).
> By the way I had no way to check digital waveforms on both DAC?s
> beacause they are placed underneath a big daughter board.
> 
> So what do you think about that ?
> 
> Hmmm.
> 
> 
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From fanwander at mnet-online.de  Fri Dec  1 17:22:33 2023
From: fanwander at mnet-online.de (Florian Anwander)
Date: Fri, 1 Dec 2023 17:22:33 +0100
Subject: [sdiy] PCM1702 DAC fakes ? or not ??
In-Reply-To: <000001da2463$cf388140$6da983c0$@oricom.ca>
References: <000001d602ae$d42f19f0$7c8d4dd0$@oricom.ca>
 <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
 <000001da2463$cf388140$6da983c0$@oricom.ca>
Message-ID: <ccce232e-4988-4627-8823-4689f9fe3410@mnet-online.de>

Am 01.12.23 um 15:36 schrieb Jean-Pierre Desrochers:
> Or the driving IC that brings QCLK and WCLK to both DAC?s
> that is getting weak and drop when 2 DAC?s are installed (That I doubt).
If this would be the case, then the both DAC would have been silent 
before too.
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From jpdesroc at oricom.ca  Fri Dec  1 18:16:00 2023
From: jpdesroc at oricom.ca (Jean-Pierre Desrochers)
Date: Fri, 1 Dec 2023 12:16:00 -0500
Subject: [sdiy] (Was) PCM1702 DAC fakes ? or not ?? . . PCM1702 vs PCM1702U
 ????
In-Reply-To: <ccce232e-4988-4627-8823-4689f9fe3410@mnet-online.de>
References: <000001d602ae$d42f19f0$7c8d4dd0$@oricom.ca>
 <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
 <000001da2463$cf388140$6da983c0$@oricom.ca>
 <ccce232e-4988-4627-8823-4689f9fe3410@mnet-online.de>
Message-ID: <001d01da247a$0ebbf520$2c33df60$@oricom.ca>

I have the Burr-Brown PCM1702 datasheet attached and cannot find the difference between 

PCM1702 vs PCM1702U parts..

 

The sheet says that PCM1702U part is marked as PCM1702 on the package.



But I could clearly see on the web both printings available..

 

PCM1702U printed (like those I bought) looks like fake to me.. 

The PCM1702 printed version is what was installed in the Clavinova !

 





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From lanterma at ece.gatech.edu  Sat Dec  2 01:12:57 2023
From: lanterma at ece.gatech.edu (Lanterman, Aaron D)
Date: Sat, 2 Dec 2023 00:12:57 +0000
Subject: [sdiy] My paper on vacuum tube circuits...
Message-ID: <13866EA2-E5C3-486A-AC96-C68DB5F355A5@ece.gatech.edu>

?for those interested in such things:

https://www.mdpi.com/2079-9292/12/23/4804

?On the Application of Thevenin Equivalent Circuits to the Analysis of Vacuum Tube Circuits?

It?s open access so it?s not behind a paywall.

In it, I adapt the techniques my colleague Marshall Leach used to explain transistor circuits to vacuum tubes. I use these equivalent circuits when teaching my Guitar Amplification and Effects class (which I?m running again this Spring):

https://www.youtube.com/playlist?list=PLOunECWxELQS7JV_KeeTJJpgGjOftoaAH

I use Marshall?s transistor techniques when I teach ECE3400: Analog Electronics (I think I?m the only instructor to do so since Marshall passed away):

https://www.youtube.com/playlist?list=PLOunECWxELQSbOv3ekzuwC4K8ygV-Jkiy

Aaron Lanterman, Prof. of ECE, Georgia Tech
My blog on Education and Innovation: https://edupocalypsenow.wordpress.com
My blog on Electronics and Programming: https://lantertronics.blogspot.com
My YouTube channel on Electronics and Programming: https://www.youtube.com/c/lantertronics



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From mr.threv at gmail.com  Tue Dec  5 00:14:21 2023
From: mr.threv at gmail.com (Matt Simpson)
Date: Mon, 4 Dec 2023 18:14:21 -0500
Subject: [sdiy] My paper on vacuum tube circuits...
In-Reply-To: <13866EA2-E5C3-486A-AC96-C68DB5F355A5@ece.gatech.edu>
References: <13866EA2-E5C3-486A-AC96-C68DB5F355A5@ece.gatech.edu>
Message-ID: <CANLbhbaweWC=uFGG+Bv8MrapVK1yHNu-aJ1ub+28b8F0nMMsXw@mail.gmail.com>

keep up the great work, dr. lanterman! dr. leach would be proud (rest in
power)
--
threv
the mobius on wrek atlanta :: themobius.livejournal.com


On Fri, Dec 1, 2023 at 7:15?PM Lanterman, Aaron D via Synth-diy <
synth-diy at synth-diy.org> wrote:

> ?for those interested in such things:
>
> https://www.mdpi.com/2079-9292/12/23/4804
>
> ?On the Application of Thevenin Equivalent Circuits to the Analysis of
> Vacuum Tube Circuits?
>
> It?s open access so it?s not behind a paywall.
>
> In it, I adapt the techniques my colleague Marshall Leach used to explain
> transistor circuits to vacuum tubes. I use these equivalent circuits when
> teaching my Guitar Amplification and Effects class (which I?m running again
> this Spring):
>
> https://www.youtube.com/playlist?list=PLOunECWxELQS7JV_KeeTJJpgGjOftoaAH
>
> I use Marshall?s transistor techniques when I teach ECE3400: Analog
> Electronics (I think I?m the only instructor to do so since Marshall passed
> away):
>
> https://www.youtube.com/playlist?list=PLOunECWxELQSbOv3ekzuwC4K8ygV-Jkiy
>
> Aaron Lanterman, Prof. of ECE, Georgia Tech
> My blog on Education and Innovation: https://edupocalypsenow.wordpress.com
> My blog on Electronics and Programming: https://lantertronics.blogspot.com
> My YouTube channel on Electronics and Programming:
> https://www.youtube.com/c/lantertronics
>
>
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From nathan at idmclassics.net  Tue Dec  5 20:40:01 2023
From: nathan at idmclassics.net (Nathan Trites)
Date: Tue, 5 Dec 2023 14:40:01 -0500
Subject: [sdiy] (Was) PCM1702 DAC fakes ? or not ?? . . PCM1702 vs
 PCM1702U ????
In-Reply-To: <001d01da247a$0ebbf520$2c33df60$@oricom.ca>
References: <000001d602ae$d42f19f0$7c8d4dd0$@oricom.ca>
 <20FDF639-35A2-4DC1-B341-243FBEC814B3@electricdruid.net>
 <000001da2463$cf388140$6da983c0$@oricom.ca>
 <ccce232e-4988-4627-8823-4689f9fe3410@mnet-online.de>
 <001d01da247a$0ebbf520$2c33df60$@oricom.ca>
Message-ID: <CAHy3N6AWGhBp8wicM3MctR=-r0PuC2O0nC6TWDVjbTnM6gf=Sg@mail.gmail.com>

Hi Jean-Pierre,

See if you can find an ebay listing using the same date code as the ones
you got from Syntaur from different sellers and compare reviews. I've had
that happen before with other "legit" sources sending me bad parts when I
was trying to avoid sketchy ones. I've also had a lot of authentic chips
where testing shows they all have various issues and must have been
rejected or stored poorly, also from legit sellers.

The PCM1702U 42VT3M2 you have in this email for example, you can see on the
bottom of the ebay listing there's one review saying that they didn't work,
but one saying they did in a Clavinova:
https://www.ebay.com/itm/384495448805

Nathan

On Fri, Dec 1, 2023 at 12:16?PM Jean-Pierre Desrochers <jpdesroc at oricom.ca>
wrote:

> I have the Burr-Brown PCM1702 datasheet attached and cannot find the
> difference between
>
> PCM1702 vs PCM1702U parts..
>
>
>
> The sheet says that PCM1702U part is marked as PCM1702 on the package.
>
> But I could clearly see on the web both printings available..
>
>
>
> PCM1702U printed (like those I bought) looks like fake to me..
>
> The PCM1702 printed version is what was installed in the Clavinova !
>
>
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From danjel at intellijel.com  Fri Dec  8 01:35:50 2023
From: danjel at intellijel.com (Danjel van Tijn / intellijel)
Date: Thu, 7 Dec 2023 16:35:50 -0800
Subject: [sdiy] Generating a large number of CV outputs
Message-ID: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>

What is the current ideal way to generate a large number of CV outputs from
a single CPU?

Let's say I wanted to generate 100 outputs with an update rate of a few kHz
and an equivalent bit depth of 12 or 16 bits.

I know that back in the day when DACs were extremely expensive, the designs
would use a single DAC and then demux to a bunch of S&Hs.

Now that DACs are cheaper, is it better to chain a bunch of 8- or
16-channel DACs?

Or would it make more sense to use an FPGA and create a giant multi-channel
1-Bit DAC?

Looking at some Elektron hardware teardowns it appears that they are using
the latter approach.
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From jschwich53 at comcast.net  Fri Dec  8 02:02:31 2023
From: jschwich53 at comcast.net (Jay Schwichtenberg)
Date: Thu, 7 Dec 2023 17:02:31 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
Message-ID: <5e08b83b-b25a-47b1-a160-c85977956727@comcast.net>

You are probably going to have to have a master to set everything up and 
multiple processors to output stuff in parallel.

Figure out which interface you are going to use. Probably SPI or I2C, 
even though a lot of SPI interfaces run at 50 MHz it's going to take PCB 
rocket science to get it to work that fast.

Then pick your chips you're going to use.

Last thing is do a calculation to figure out how long it actually takes 
to do a transfer.

Jay S.

On 12/7/2023 4:35 PM, Danjel van Tijn / intellijel wrote:
> What is the current ideal way to generate a large number of CV outputs 
> from a single CPU?
>
> Let's say I wanted to generate 100 outputs with an update rate of a 
> few kHz and an equivalent bit depth of 12 or 16 bits.
>
> I know that back in the day when DACs were extremely expensive, the 
> designs would use a single DAC and then demux to a bunch of S&Hs.
>
> Now that DACs are cheaper, is it better to chain a bunch of 8- or 
> 16-channel DACs?
>
> Or would it make more sense to use an FPGA and create a giant 
> multi-channel 1-Bit DAC?
>
> Looking at some Elektron hardware teardowns it appears that they are 
> using the latter approach.
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Usemarketplace at synth-diy.org
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From mskala at northcoastsynthesis.com  Fri Dec  8 02:21:47 2023
From: mskala at northcoastsynthesis.com (mskala at northcoastsynthesis.com)
Date: Thu, 7 Dec 2023 20:21:47 -0500 (EST)
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
Message-ID: <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>

On Thu, 7 Dec 2023, Danjel van Tijn / intellijel wrote:

> Let's say I wanted to generate 100 outputs with an update rate of a few kHz
> and an equivalent bit depth of 12 or 16 bits.

Which is it, 12 or 16?  You've got your work cut out for you if you really
want 16-bit absolute DC voltage precision on even one output.  The number
of outputs isn't your biggest concern when that's a serious goal.

> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel
> DACs??
>
> Or would it make more sense to use an FPGA and create a giant multi-channel
> 1-Bit DAC?

Using an FPGA is going to require you to solve for yourself a lot of
problems that would be solved for you if you used ready-made DAC chips.
I wouldn't be eager to do that.  I also don't think 1-bit DACs are
well-suited to generating precise DC voltages; as I wrote at length in my
recent Web log series (https://northcoastsynthesis.com/news/dacs-and-bit-count/
et seq.), they reproduce signals, not voltages.

However, if you do put in the effort to make it work, the FPGA would
probably be cheaper.

-- 
Matthew Skala
North Coast Synthesis Ltd.


From mbryant at futurehorizons.com  Fri Dec  8 02:58:14 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 01:58:14 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
Message-ID: <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

  *   https://northcoastsynthesis.com/news/dacs-and-bit-count/
et seq

I just had a read of this and generally very well put.  However you seem to miss out mentioning PDM  between the sections on PWM and Delta-Sigma.  This gives faster settling time of DC voltages than PWM, as well as other advantages when producing audio as its easier to push the noise out of band.

I used PDM (using 74LS TTL and some transistors) in the 1980s for an accurate fast settling DC voltage reference in a HP instrument requiring better then 16 bits as one of its uses was to verify in production the then new 16 bit(-ish) convertors.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Matthew Skala via Synth-diy <synth-diy at synth-diy.org>
Sent: 08 December 2023 01:21
To: Danjel van Tijn / intellijel <danjel at intellijel.com>
Cc: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

On Thu, 7 Dec 2023, Danjel van Tijn / intellijel wrote:

> Let's say I wanted to generate 100 outputs with an update rate of a few kHz
> and an equivalent bit depth of 12 or 16 bits.

Which is it, 12 or 16?  You've got your work cut out for you if you really
want 16-bit absolute DC voltage precision on even one output.  The number
of outputs isn't your biggest concern when that's a serious goal.

> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel
> DACs?
>
> Or would it make more sense to use an FPGA and create a giant multi-channel
> 1-Bit DAC?

Using an FPGA is going to require you to solve for yourself a lot of
problems that would be solved for you if you used ready-made DAC chips.
I wouldn't be eager to do that.  I also don't think 1-bit DACs are
well-suited to generating precise DC voltages; as I wrote at length in my
recent Web log series (https://northcoastsynthesis.com/news/dacs-and-bit-count/
et seq.), they reproduce signals, not voltages.

However, if you do put in the effort to make it work, the FPGA would
probably be cheaper.

--
Matthew Skala
North Coast Synthesis Ltd.
_______________________________________________
Synth-diy mailing list
Synth-diy at synth-diy.org
http://synth-diy.org/mailman/listinfo/synth-diy
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From dkantowitz at gmail.com  Fri Dec  8 04:16:31 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Thu, 7 Dec 2023 19:16:31 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAEfLrHGVzbtSKu7JK552yG5fBqYKB_GRgyf5nO5MbGM1FR8K0w@mail.gmail.com>

A few sentences here about how FPGA is used to generate DAC outputs from
FPGA for 3 Body oscillator.
https://youtu.be/iVmGgd6gzJ0?t=192




On Thu, Dec 7, 2023 at 6:01?PM Mike Bryant <mbryant at futurehorizons.com>
wrote:

>
>    - https://northcoastsynthesis.com/news/dacs-and-bit-count/
>    et seq
>
>
> I just had a read of this and generally very well put.  However you seem
> to miss out mentioning PDM  between the sections on PWM and Delta-Sigma.
> This gives faster settling time of DC voltages than PWM, as well as other
> advantages when producing audio as its easier to push the noise out of
> band.
>
> I used PDM (using 74LS TTL and some transistors) in the 1980s for an
> accurate fast settling DC voltage reference in a HP instrument requiring
> better then 16 bits as one of its uses was to verify in production the then
> new 16 bit(-ish) convertors.
>
> ------------------------------
> *From:* Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Matthew
> Skala via Synth-diy <synth-diy at synth-diy.org>
> *Sent:* 08 December 2023 01:21
> *To:* Danjel van Tijn / intellijel <danjel at intellijel.com>
> *Cc:* SDIY <synth-diy at synth-diy.org>
> *Subject:* Re: [sdiy] Generating a large number of CV outputs
>
> On Thu, 7 Dec 2023, Danjel van Tijn / intellijel wrote:
>
> > Let's say I wanted to generate 100 outputs with an update rate of a few
> kHz
> > and an equivalent bit depth of 12 or 16 bits.
>
> Which is it, 12 or 16?  You've got your work cut out for you if you really
> want 16-bit absolute DC voltage precision on even one output.  The number
> of outputs isn't your biggest concern when that's a serious goal.
>
> > Now that DACs are cheaper, is it better to chain a bunch of 8- or
> 16-channel
> > DACs?
> >
> > Or would it make more sense to use an FPGA and create a giant
> multi-channel
> > 1-Bit DAC?
>
> Using an FPGA is going to require you to solve for yourself a lot of
> problems that would be solved for you if you used ready-made DAC chips.
> I wouldn't be eager to do that.  I also don't think 1-bit DACs are
> well-suited to generating precise DC voltages; as I wrote at length in my
> recent Web log series (
> https://northcoastsynthesis.com/news/dacs-and-bit-count/
> et seq.), they reproduce signals, not voltages.
>
> However, if you do put in the effort to make it work, the FPGA would
> probably be cheaper.
>
> --
> Matthew Skala
> North Coast Synthesis Ltd.
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From mskala at northcoastsynthesis.com  Fri Dec  8 04:30:08 2023
From: mskala at northcoastsynthesis.com (mskala at northcoastsynthesis.com)
Date: Thu, 7 Dec 2023 22:30:08 -0500 (EST)
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>

On Fri, 8 Dec 2023, Mike Bryant wrote:

> I just had a read of this and generally very well put.? However you seem to
> miss out mentioning PDM? between the sections on PWM and Delta-Sigma.? This
> gives faster settling time of DC voltages than PWM, as well as other
> advantages when producing audio as its easier to push the noise out of
> band.???

I'm not sure PDM is meaningfully different from delta-sigma at the level
of detail I included in the posting.  The things I would want to say about
it would be the same things I did say about delta-sigma.  Is there an
important example of a PDM scheme that is not a form of PWM nor
delta-sigma modulation?

-- 
Matthew Skala
North Coast Synthesis Ltd.


From ebrombaugh at gmail.com  Fri Dec  8 06:57:03 2023
From: ebrombaugh at gmail.com (Eric Brombaugh)
Date: Thu, 7 Dec 2023 22:57:03 -0700
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
Message-ID: <b5a642f7-55b8-4bb7-9089-cfb7378d87d2@gmail.com>

I did a PDM 16-bit stereo audio output with a low-end FPGA a while back 
and it worked pretty well - resolution and THD were both excellent. I 
could easily see extending that to many independent outputs, but I agree 
that absolute DC accuracy would likely be a challenge requiring careful 
electrical design and calibration at mfg time might be necessary.

Eric

On 12/7/23 18:21, Matthew Skala via Synth-diy wrote:
> On Thu, 7 Dec 2023, Danjel van Tijn / intellijel wrote:
> 
>> Let's say I wanted to generate 100 outputs with an update rate of a few kHz
>> and an equivalent bit depth of 12 or 16 bits.
> 
> Which is it, 12 or 16?  You've got your work cut out for you if you really
> want 16-bit absolute DC voltage precision on even one output.  The number
> of outputs isn't your biggest concern when that's a serious goal.
> 
>> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel
>> DACs?
>>
>> Or would it make more sense to use an FPGA and create a giant multi-channel
>> 1-Bit DAC?
> 
> Using an FPGA is going to require you to solve for yourself a lot of
> problems that would be solved for you if you used ready-made DAC chips.
> I wouldn't be eager to do that.  I also don't think 1-bit DACs are
> well-suited to generating precise DC voltages; as I wrote at length in my
> recent Web log series (https://northcoastsynthesis.com/news/dacs-and-bit-count/
> et seq.), they reproduce signals, not voltages.
> 
> However, if you do put in the effort to make it work, the FPGA would
> probably be cheaper.
> 


From mr at analogue.org  Fri Dec  8 09:25:55 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Fri, 8 Dec 2023 09:25:55 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
Message-ID: <CAP92RBX_Q2nsn0EUnLoyNGLXmgZYha3dECzj-aQCDUt+DgoebA@mail.gmail.com>

Hej Danjel! :-)

On Fri, 8 Dec 2023 at 01:37, Danjel van Tijn / intellijel <
danjel at intellijel.com> wrote:

> ...
> Or would it make more sense to use an FPGA and create a giant
> multi-channel 1-Bit DAC?
>
> Looking at some Elektron hardware teardowns it appears that they are using
> the latter approach.
>

Actually not, even if I'm interested in trying similar solutions.
The FPGA does lots of tricks and sends data to a very fast 16-bit DAC,
which is then multiplexed to dozens of CVs. Sadly the DAC is NRND (but
still made, for years and years) and doesn't really have any alternative
coming close to its price/performance, so I cannot really recommend this
exact solution.

Thanks guys for the pointers to the Schlappi video and Matthew's Web log -
I'm off to read it now.

Best,
/mr
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From mbryant at futurehorizons.com  Fri Dec  8 10:34:40 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 09:34:40 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
Message-ID: <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Yes the key thing about PDM over other methods is it doesn't have to have a fundamental fairly low sampling rate like PWM or D-S.  This gives it much faster response time to requested changes.  One way to think of it is that PWM and D-S have a low pass filter on their feedback loops, which D-S actually does have, whilst PWM sort of has in the lag of changing the M-S ratio.

This, and the fact that you get far less energy at the sampling rate, is why many digital microphones have moved to using PDM, and of course most new MCUs now support this mode.

________________________________
From: mskala at northcoastsynthesis.com <mskala at northcoastsynthesis.com>
Sent: 08 December 2023 03:30
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Danjel van Tijn / intellijel <danjel at intellijel.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

On Fri, 8 Dec 2023, Mike Bryant wrote:

> I just had a read of this and generally very well put.  However you seem to
> miss out mentioning PDM  between the sections on PWM and Delta-Sigma.  This
> gives faster settling time of DC voltages than PWM, as well as other
> advantages when producing audio as its easier to push the noise out of
> band.

I'm not sure PDM is meaningfully different from delta-sigma at the level
of detail I included in the posting.  The things I would want to say about
it would be the same things I did say about delta-sigma.  Is there an
important example of a PDM scheme that is not a form of PWM nor
delta-sigma modulation?

--
Matthew Skala
North Coast Synthesis Ltd.
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From rburnett at richieburnett.co.uk  Fri Dec  8 11:47:36 2023
From: rburnett at richieburnett.co.uk (Richie Burnett)
Date: Fri, 8 Dec 2023 10:47:36 -0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <F3C69E8DEB5641A6B9042BF1F33CDFF9@DESKTOPUHPK2VO>

I forget, is PDM equivalent to PWM but with the ramp counter bit-reversed 
before it gets compared with the reference?  So the overall ratio of 1's to 
0's in one period of the bit sequence is the same as PWM, but the 1's and 
0's are scattered around the period, instead of having all of the 1's 
grouped at the start of the period and all of the 0's grouped together at 
the end of the period.  Am I right?

-Richie,



-----Original Message----- 
From: Mike Bryant
Sent: Friday, December 8, 2023 9:34 AM
To: mskala at northcoastsynthesis.com
Cc: SDIY
Subject: Re: [sdiy] Generating a large number of CV outputs


Yes the key thing about PDM over other methods is it doesn't have to have a 
fundamental fairly low sampling rate like PWM or D-S.  This gives it much 
faster response time to requested changes.  One way to think of it is that 
PWM and D-S have a low pass filter on their feedback loops, which D-S 
actually does have, whilst PWM sort of has in the lag of changing the M-S 
ratio.


This, and the fact that you get far less energy at the sampling rate, is why 
many digital microphones have moved to using PDM, and of course most new 
MCUs now support this mode.




From: mskala at northcoastsynthesis.com <mskala at northcoastsynthesis.com>
Sent: 08 December 2023 03:30
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Danjel van Tijn / intellijel <danjel at intellijel.com>; SDIY 
<synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs


On Fri, 8 Dec 2023, Mike Bryant wrote:

> I just had a read of this and generally very well put.  However you seem 
> to
> miss out mentioning PDM  between the sections on PWM and Delta-Sigma. 
> This
> gives faster settling time of DC voltages than PWM, as well as other
> advantages when producing audio as its easier to push the noise out of
> band.

I'm not sure PDM is meaningfully different from delta-sigma at the level
of detail I included in the posting.  The things I would want to say about
it would be the same things I did say about delta-sigma.  Is there an
important example of a PDM scheme that is not a form of PWM nor
delta-sigma modulation?

-- 
Matthew Skala
North Coast Synthesis Ltd.






_______________________________________________
Synth-diy mailing list
Synth-diy at synth-diy.org
http://synth-diy.org/mailman/listinfo/synth-diy
Selling or trading? Use marketplace at synth-diy.org 


-- 
This email has been checked for viruses by AVG antivirus software.
www.avg.com


From tom at electricdruid.net  Fri Dec  8 12:12:10 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Fri, 8 Dec 2023 11:12:10 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <F3C69E8DEB5641A6B9042BF1F33CDFF9@DESKTOPUHPK2VO>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <F3C69E8DEB5641A6B9042BF1F33CDFF9@DESKTOPUHPK2VO>
Message-ID: <793BD74C-7663-4009-BCC4-881E3197DDA3@electricdruid.net>

That wasn't how I generated it, but yes, the 1's and 0's are scattered across the period instead of being all-the-1s followed by all-the-0s. That massively reduces the amount of noise in the signal by making it way higher in frequency.

One other side effect is that the worst-case situation appears when there are very few 1s or very few 0s, at the extreme values. In this situation it's impossible to avoid outputting long series of 1s or 0s, so the effective output rate drops. This is completely different to PWM, where the worst-case situation is where you get a 50/50% duty cycle for your midpoint value. This makes the "bad bits" of a PDM output much easier to avoid, especially for audio - just reduce the output amplitude a little bit so you don't push the PDM output right to its extremes. This is not possible with PWM.

Tom

==================
       Electric Druid
Synth & Stompbox DIY
==================



> On 8 Dec 2023, at 10:47, Richie Burnett <rburnett at richieburnett.co.uk> wrote:
> 
> I forget, is PDM equivalent to PWM but with the ramp counter bit-reversed before it gets compared with the reference?  So the overall ratio of 1's to 0's in one period of the bit sequence is the same as PWM, but the 1's and 0's are scattered around the period, instead of having all of the 1's grouped at the start of the period and all of the 0's grouped together at the end of the period.  Am I right?
> 
> -Richie,
> 
> 
> 
> -----Original Message----- From: Mike Bryant
> Sent: Friday, December 8, 2023 9:34 AM
> To: mskala at northcoastsynthesis.com
> Cc: SDIY
> Subject: Re: [sdiy] Generating a large number of CV outputs
> 
> 
> Yes the key thing about PDM over other methods is it doesn't have to have a fundamental fairly low sampling rate like PWM or D-S.  This gives it much faster response time to requested changes.  One way to think of it is that PWM and D-S have a low pass filter on their feedback loops, which D-S actually does have, whilst PWM sort of has in the lag of changing the M-S ratio.
> 
> 
> This, and the fact that you get far less energy at the sampling rate, is why many digital microphones have moved to using PDM, and of course most new MCUs now support this mode.
> 
> 
> 
> 
> From: mskala at northcoastsynthesis.com <mskala at northcoastsynthesis.com>
> Sent: 08 December 2023 03:30
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Danjel van Tijn / intellijel <danjel at intellijel.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
> 
> 
> On Fri, 8 Dec 2023, Mike Bryant wrote:
> 
>> I just had a read of this and generally very well put.  However you seem to
>> miss out mentioning PDM  between the sections on PWM and Delta-Sigma. This
>> gives faster settling time of DC voltages than PWM, as well as other
>> advantages when producing audio as its easier to push the noise out of
>> band.
> 
> I'm not sure PDM is meaningfully different from delta-sigma at the level
> of detail I included in the posting.  The things I would want to say about
> it would be the same things I did say about delta-sigma.  Is there an
> important example of a PDM scheme that is not a form of PWM nor
> delta-sigma modulation?
> 
> -- 
> Matthew Skala
> North Coast Synthesis Ltd.
> 
> 
> 
> 
> 
> 
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org 
> 
> -- 
> This email has been checked for viruses by AVG antivirus software.
> www.avg.com
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org




From mbryant at futurehorizons.com  Fri Dec  8 13:00:59 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 12:00:59 +0000
Subject: [sdiy] Test for Mattias - please ignore and don't respond to it
In-Reply-To: <793BD74C-7663-4009-BCC4-881E3197DDA3@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <F3C69E8DEB5641A6B9042BF1F33CDFF9@DESKTOPUHPK2VO>
 <793BD74C-7663-4009-BCC4-881E3197DDA3@electricdruid.net>
Message-ID: <CWLP265MB71325F1A25E8D988CE8E50D5DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>


We're trying to find why some messages go missing.

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From mbryant at futurehorizons.com  Fri Dec  8 13:03:58 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 12:03:58 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <F3C69E8DEB5641A6B9042BF1F33CDFF9@DESKTOPUHPK2VO>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <F3C69E8DEB5641A6B9042BF1F33CDFF9@DESKTOPUHPK2VO>
Message-ID: <CWLP265MB7132207CAB8F64351E55F3D1DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

That's one way of doing it, but still locks you into a lower sampling rate.  Often better to just sample at a very high rate (as fast as your logic allows) and just decide do I need to output a '1' now or not.

________________________________
From: Richie Burnett <rburnett at richieburnett.co.uk>
Sent: 08 December 2023 10:47
To: Mike Bryant <mbryant at futurehorizons.com>; mskala at northcoastsynthesis.com <mskala at northcoastsynthesis.com>
Cc: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

I forget, is PDM equivalent to PWM but with the ramp counter bit-reversed
before it gets compared with the reference?  So the overall ratio of 1's to
0's in one period of the bit sequence is the same as PWM, but the 1's and
0's are scattered around the period, instead of having all of the 1's
grouped at the start of the period and all of the 0's grouped together at
the end of the period.  Am I right?

-Richie,



-----Original Message-----
From: Mike Bryant
Sent: Friday, December 8, 2023 9:34 AM
To: mskala at northcoastsynthesis.com
Cc: SDIY
Subject: Re: [sdiy] Generating a large number of CV outputs


Yes the key thing about PDM over other methods is it doesn't have to have a
fundamental fairly low sampling rate like PWM or D-S.  This gives it much
faster response time to requested changes.  One way to think of it is that
PWM and D-S have a low pass filter on their feedback loops, which D-S
actually does have, whilst PWM sort of has in the lag of changing the M-S
ratio.


This, and the fact that you get far less energy at the sampling rate, is why
many digital microphones have moved to using PDM, and of course most new
MCUs now support this mode.




From: mskala at northcoastsynthesis.com <mskala at northcoastsynthesis.com>
Sent: 08 December 2023 03:30
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Danjel van Tijn / intellijel <danjel at intellijel.com>; SDIY
<synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs


On Fri, 8 Dec 2023, Mike Bryant wrote:

> I just had a read of this and generally very well put.  However you seem
> to
> miss out mentioning PDM  between the sections on PWM and Delta-Sigma.
> This
> gives faster settling time of DC voltages than PWM, as well as other
> advantages when producing audio as its easier to push the noise out of
> band.

I'm not sure PDM is meaningfully different from delta-sigma at the level
of detail I included in the posting.  The things I would want to say about
it would be the same things I did say about delta-sigma.  Is there an
important example of a PDM scheme that is not a form of PWM nor
delta-sigma modulation?

--
Matthew Skala
North Coast Synthesis Ltd.






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From modular at go2.pl  Fri Dec  8 15:07:20 2023
From: modular at go2.pl (Roman Sowa)
Date: Fri, 8 Dec 2023 15:07:20 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
Message-ID: <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>

I'm triggered, because that's something I was recently evaluating (but 
don't feel like doing for various reasons).
The DACs can be as cheap as they wish, but will never be S&H-MUX cheap.
Surely there are cheap excellent 12-bit DACs now with price per channel 
below $1 but that's still a lot of money. You could also consider 
96-channel DAC and just don't bother designing huge circuitry around it, 
but not only it cost $80 in singles but also is huge BGA monster.

I reckon you're not doing it for space or military, so IMHO the mux way 
is the only way still.

With 100 outs at "few" kHz update rate you're struggling with 1us analog 
MUX settling time, and when you say 16-bit, that makes me shiver.
What you can do is split it to couple of separate muxes with their own 
DACs, and feed them sequentially. Huge analog circuitry with lots of 
muxes, opamps, caps and countless meters of traces will be happier 
getting an update every 10us rather than 1us. Interlace DAC update 
moments with MUX address changes to make sure new output is well settled 
before MUX opens.
Also, with multiple DACs and MUXes you can spread the circuitry on the 
board so DAC's opamp will not have to drive too much, but only a couple 
of MUXes gathered around it.

OTOH I would love to see someone doing 100-outs MUX with single DAC 
spitting 16-bit precision at 1Msps

Roman


W dniu 2023-12-08 o?01:35, Danjel van Tijn / intellijel pisze:
> What is the current ideal way to generate a large number of CV outputs 
> from a single CPU?
> 
> Let's say I wanted to generate 100 outputs with an update rate of a few 
> kHz and an equivalent bit depth of 12 or 16 bits.
> 
> I know that back in the day when DACs were extremely expensive, the 
> designs would use a single DAC and then demux to a bunch of S&Hs.
> 
> Now that DACs are cheaper, is it better to chain a bunch of 8- or 
> 16-channel DACs?
> 
> Or would it make more sense to use an FPGA and create a giant 
> multi-channel 1-Bit DAC?
> 
> Looking at some Elektron hardware teardowns it appears that they are 
> using the latter approach.
> 
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From mbryant at futurehorizons.com  Fri Dec  8 15:23:18 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 14:23:18 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
Message-ID: <CWLP265MB713230FA4C3B5289536363F0DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

  *   OTOH I would love to see someone doing 100-outs MUX with single DAC spitting 16-bit precision at 1Msps   Roman

I think the uneven capacitance alone to each of the S/Hs would make this impossible.   And the noise from all the control signals to the gates are almost bound to cross critical tracks.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Roman Sowa <modular at go2.pl>
Sent: 08 December 2023 14:07
To: Danjel van Tijn / intellijel <danjel at intellijel.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

I'm triggered, because that's something I was recently evaluating (but
don't feel like doing for various reasons).
The DACs can be as cheap as they wish, but will never be S&H-MUX cheap.
Surely there are cheap excellent 12-bit DACs now with price per channel
below $1 but that's still a lot of money. You could also consider
96-channel DAC and just don't bother designing huge circuitry around it,
but not only it cost $80 in singles but also is huge BGA monster.

I reckon you're not doing it for space or military, so IMHO the mux way
is the only way still.

With 100 outs at "few" kHz update rate you're struggling with 1us analog
MUX settling time, and when you say 16-bit, that makes me shiver.
What you can do is split it to couple of separate muxes with their own
DACs, and feed them sequentially. Huge analog circuitry with lots of
muxes, opamps, caps and countless meters of traces will be happier
getting an update every 10us rather than 1us. Interlace DAC update
moments with MUX address changes to make sure new output is well settled
before MUX opens.
Also, with multiple DACs and MUXes you can spread the circuitry on the
board so DAC's opamp will not have to drive too much, but only a couple
of MUXes gathered around it.

OTOH I would love to see someone doing 100-outs MUX with single DAC
spitting 16-bit precision at 1Msps

Roman


W dniu 2023-12-08 o 01:35, Danjel van Tijn / intellijel pisze:
> What is the current ideal way to generate a large number of CV outputs
> from a single CPU?
>
> Let's say I wanted to generate 100 outputs with an update rate of a few
> kHz and an equivalent bit depth of 12 or 16 bits.
>
> I know that back in the day when DACs were extremely expensive, the
> designs would use a single DAC and then demux to a bunch of S&Hs.
>
> Now that DACs are cheaper, is it better to chain a bunch of 8- or
> 16-channel DACs?
>
> Or would it make more sense to use an FPGA and create a giant
> multi-channel 1-Bit DAC?
>
> Looking at some Elektron hardware teardowns it appears that they are
> using the latter approach.
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
_______________________________________________
Synth-diy mailing list
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From mskala at northcoastsynthesis.com  Fri Dec  8 15:41:33 2023
From: mskala at northcoastsynthesis.com (mskala at northcoastsynthesis.com)
Date: Fri, 8 Dec 2023 09:41:33 -0500 (EST)
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>

On Fri, 8 Dec 2023, Mike Bryant wrote:

> Yes the key thing about PDM over other methods is it doesn't have to have a
> fundamental fairly low sampling rate like PWM or D-S.? This gives it much
> faster response time to requested changes.? One way to think of it is that
> PWM and D-S have a low pass filter on their feedback loops, which D-S
> actually does have, whilst PWM sort of has in the lag of changing the M-S
> ratio.

I'm not sure it's true that delta-sigma has to have a fundamental fairly
slow sampling rate (more precisely:  ratio between clock rate and sample
rate exponential in the number of bits) like PWM.  I think the ability to
change the output much faster than PWM can is one of the specific
advantages of delta-sigma over PWM, as I wrote:

   If you change the target voltage for a delta-sigma DAC, you have the
   opportunity to make the output change much sooner than with PWM. With
   PWM, you basically have to wait until the next sample cycle; but a
   delta-sigma DAC asked to produce a lower target output voltage can
   drive the output low as soon as the next clock tick to start converging
   on the new value.  Whereas PWM couldn't possibly reproduce an output
   signal at a higher frequency than half the sampling rate (by the
   Nyquist Theorem), and the sampling rate was limited to 1/2n of the
   clock rate, with the delta-sigma DAC the highest output frequency is
   related directly to the clock rate instead.  That allows shrinking the
   clock rate from what a simple estimate based on sample rate and bit
   precision would otherwise imply.

If PDM means PWM with bit-reversal before the comparison (such as Richie
describes), then it does indeed lock you into a lower sampling rate, and
that's one reason I skipped describing *that* technique.  But PWM with
bit-reversal seems not to be what you mean when you say PDM.

-- 
Matthew Skala
North Coast Synthesis Ltd.


From mr at analogue.org  Fri Dec  8 15:50:27 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Fri, 8 Dec 2023 15:50:27 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
Message-ID: <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>

Roman Sowa <modular at go2.pl> skrev:

>
> OTOH I would love to see someone doing 100-outs MUX with single DAC
> spitting 16-bit precision at 1Msps
>

That's basically what we do since 2012.
16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV
channels, each at 24kHz update rate (no zipper noise in the audio band).
Works well, but I wouldn't want to try controlling that DAC/mux timing with
a microprocessor, or build it on a single-sided board. :-)

/mr
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From tom at electricdruid.net  Fri Dec  8 17:01:27 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Fri, 8 Dec 2023 16:01:27 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
Message-ID: <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>



> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> 
> If PDM means PWM with bit-reversal before the comparison (such as Richie
> describes), then it does indeed lock you into a lower sampling rate, and
> that's one reason I skipped describing *that* technique.  But PWM with
> bit-reversal seems not to be what you mean when you say PDM.


That's not what I meant when I said PDM, certainly.

The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.

Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.

HTH,
Tom

==================
       Electric Druid
Synth & Stompbox DIY
==================

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From mbryant at futurehorizons.com  Fri Dec  8 17:07:38 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 16:07:38 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
Message-ID: <CWLP265MB71323DD1D9D836BCBF263BF2DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>


  *   From: Tom Wiltshire <tom at electricdruid.net>


  *   That's not what I meant when I said PDM, certainly.


Yes that's what I did for the HP product in the 80s.  I think if I was doing it nowadays I might try to use a faster clock with a larger counter and perhaps add some digital jitter to the output pulses, maybe by varying the last few bits of the phase increment, so as to reduce any EMC problems which we were only just beginning to worry about then.


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From mr at analogue.org  Fri Dec  8 17:15:11 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Fri, 8 Dec 2023 17:15:11 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
Message-ID: <CAP92RBXNf9q+30JbVP_kbAVrybJWdgmHZLhOU_RN=hBAYKz6XQ@mail.gmail.com>

But what about potential problems and errors from

1 - the non-constant number of transitions per time?

2 - the non-constant frequency of the pulse wave?

/mr


On Fri, 8 Dec 2023 at 17:02, Tom Wiltshire <tom at electricdruid.net> wrote:

>
>
> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
> synth-diy at synth-diy.org> wrote:
>
> If PDM means PWM with bit-reversal before the comparison (such as Richie
> describes), then it does indeed lock you into a lower sampling rate, and
> that's one reason I skipped describing *that* technique.  But PWM with
> bit-reversal seems not to be what you mean when you say PDM.
>
>
> That's not what I meant when I said PDM, certainly.
>
> The way I generated it is using an NCO. The NCO generates a single-shot
> output pulse everytime the phase accumulator wraps.
>
> Now consider what happens with a simple 8-bit NCO. If our frequency
> increment is 2, for example, we get a single output pulse every 128 clocks,
> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
> not next to each other like PWM. The output frequency would be (clock
> frequency / 128) in this situation.
> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per
> 256 clocks, and again, they're nicely spaced out. The output frequency is
> now up to (clock /32) so there's been a big improvement, just by getting
> away from those extreme values a little bit.
> As the increment climbs, the accumulator wraps more and more often. At
> freq=128, every other clock is an output and we reach our maximum output
> frequency of (clock/2). As the increment goes above half, we start staying
> high for more than a single pulse, and the waveform effectively turns the
> other way up and we get a mirror image of the effect we've seen from 0-128.
>
> HTH,
> Tom
>
> ==================
>        Electric Druid
> Synth & Stompbox DIY
> ==================
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From rburnett at richieburnett.co.uk  Fri Dec  8 17:21:18 2023
From: rburnett at richieburnett.co.uk (Richie Burnett)
Date: Fri, 8 Dec 2023 16:21:18 -0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
Message-ID: <0BA9CDEA2BD84AE79F02C2C6E853E81C@DESKTOPUHPK2VO>

Thanks for explaining your implementation Tom!

-Richie,

-----Original Message----- 
From: Tom Wiltshire
Sent: Friday, December 8, 2023 4:01 PM
To: mskala at northcoastsynthesis.com
Cc: SDIY
Subject: Re: [sdiy] Generating a large number of CV outputs





On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy 
<synth-diy at synth-diy.org> wrote:


If PDM means PWM with bit-reversal before the comparison (such as Richie
describes), then it does indeed lock you into a lower sampling rate, and
that's one reason I skipped describing *that* technique.  But PWM with
bit-reversal seems not to be what you mean when you say PDM.


That's not what I meant when I said PDM, certainly.

The way I generated it is using an NCO. The NCO generates a single-shot 
output pulse everytime the phase accumulator wraps.

Now consider what happens with a simple 8-bit NCO. If our frequency 
increment is 2, for example, we get a single output pulse every 128 clocks, 
or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, 
not next to each other like PWM. The output frequency would be (clock 
frequency / 128) in this situation.
If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 
256 clocks, and again, they're nicely spaced out. The output frequency is 
now up to (clock /32) so there's been a big improvement, just by getting 
away from those extreme values a little bit.
As the increment climbs, the accumulator wraps more and more often. At 
freq=128, every other clock is an output and we reach our maximum output 
frequency of (clock/2). As the increment goes above half, we start staying 
high for more than a single pulse, and the waveform effectively turns the 
other way up and we get a mirror image of the effect we've seen from 0-128.

HTH,
Tom


==================
       Electric Druid
Synth & Stompbox DIY
==================






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From modular at go2.pl  Fri Dec  8 17:27:27 2023
From: modular at go2.pl (Roman Sowa)
Date: Fri, 8 Dec 2023 17:27:27 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
Message-ID: <34dc50ea-f87a-da81-9503-dffc1a014696@go2.pl>

That's impressive.
Do all those CV channels maintain 16-bit precision?
Is there any crosstalk between channels?
And who needs 24kHz update rate on CV? LFOs running at a few kHz maybe.

Roman

W dniu 2023-12-08 o?15:50, Mattias Rickardsson pisze:
> Roman Sowa <modular at go2.pl <mailto:modular at go2.pl>> skrev:
> 
> 
>     OTOH I would love to see someone doing 100-outs MUX with single DAC
>     spitting 16-bit precision at 1Msps
> 
> 
> That's basically what we do since 2012.
> 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV 
> channels, each at 24kHz update rate (no zipper noise in the audio band).
> Works well, but I wouldn't want to try controlling that DAC/mux timing 
> with a microprocessor, or build it on a single-sided board. :-)
> 
> /mr
> 


From mr at analogue.org  Fri Dec  8 17:53:07 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Fri, 8 Dec 2023 17:53:07 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <34dc50ea-f87a-da81-9503-dffc1a014696@go2.pl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <34dc50ea-f87a-da81-9503-dffc1a014696@go2.pl>
Message-ID: <CAP92RBXGUVFWd=QpKkZwk9UkL1YJpAgvxCfsVMiDkQgYpQ6M-Q@mail.gmail.com>

On Fri, 8 Dec 2023 at 17:34, Roman Sowa <modular at go2.pl> wrote:

> That's impressive.
> Do all those CV channels maintain 16-bit precision?
>

Hard to guarantee, and also hard to notice if they do since you often don't
need it. I think there's a measurable 16-bit *resolution*, but not
*precision*, because


> Is there any crosstalk between channels?
>

some slight crosstalk can be noticed under some circumstances, luckily not
resulting in huge problems. Might be mitigated if needed. :-)


> And who needs 24kHz update rate on CV? LFOs running at a few kHz maybe.
>

The actual update rate is 1.5kHz, but linearly interpolated at 24kHz in
order to not introduce audible zipper noise. It would be useful to go
slightly higher, for instance when modulation in audio band or making very
sudden envelope attacks etc.

/mr



> W dniu 2023-12-08 o 15:50, Mattias Rickardsson pisze:
> > Roman Sowa <modular at go2.pl <mailto:modular at go2.pl>> skrev:
> >
> >
> >     OTOH I would love to see someone doing 100-outs MUX with single DAC
> >     spitting 16-bit precision at 1Msps
> >
> >
> > That's basically what we do since 2012.
> > 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV
> > channels, each at 24kHz update rate (no zipper noise in the audio band).
> > Works well, but I wouldn't want to try controlling that DAC/mux timing
> > with a microprocessor, or build it on a single-sided board. :-)
> >
> > /mr
> >
>
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From tom at electricdruid.net  Fri Dec  8 19:15:48 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Fri, 8 Dec 2023 18:15:48 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBXNf9q+30JbVP_kbAVrybJWdgmHZLhOU_RN=hBAYKz6XQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAP92RBXNf9q+30JbVP_kbAVrybJWdgmHZLhOU_RN=hBAYKz6XQ@mail.gmail.com>
Message-ID: <FE2F347E-93AB-46B9-A9A7-CC9C4273D394@electricdruid.net>

What about them?!?

No-one said this was *perfect*, only quick and cheap. Two out of three isn't bad!

;)

Slightly more seriously (1) averages out over time, (2) is only a problem when the frequency gets lower at the extremes. Stay away form the extremes and you avoid this problem.


> On 8 Dec 2023, at 16:15, Mattias Rickardsson <mr at analogue.org> wrote:
> 
> But what about potential problems and errors from
> 
> 1 - the non-constant number of transitions per time?
> 
> 2 - the non-constant frequency of the pulse wave?
> 
> /mr
> 
> 
> On Fri, 8 Dec 2023 at 17:02, Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> 
> 
>> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org <mailto:synth-diy at synth-diy.org>> wrote:
>> 
>> If PDM means PWM with bit-reversal before the comparison (such as Richie
>> describes), then it does indeed lock you into a lower sampling rate, and
>> that's one reason I skipped describing *that* technique.  But PWM with
>> bit-reversal seems not to be what you mean when you say PDM.
> 
> 
> That's not what I meant when I said PDM, certainly.
> 
> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> 
> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> 
> HTH,
> Tom
> 
> ==================
>        Electric Druid
> Synth & Stompbox DIY
> ==================
> 
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org <mailto:Synth-diy at synth-diy.org>
> http://synth-diy.org/mailman/listinfo/synth-diy <http://synth-diy.org/mailman/listinfo/synth-diy>
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From igg.debus at gmail.com  Fri Dec  8 19:54:27 2023
From: igg.debus at gmail.com (Ingo Debus)
Date: Fri, 8 Dec 2023 19:54:27 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
Message-ID: <82054732-D5D5-42DD-ACB2-4BFF356E6FE3@gmail.com>



> Am 08.12.2023 um 01:35 schrieb Danjel van Tijn / intellijel <danjel at intellijel.com>:
> 
> Let's say I wanted to generate 100 outputs with an update rate of a few kHz and an equivalent bit depth of 12 or 16 bits.
> 
> I know that back in the day when DACs were extremely expensive, the designs would use a single DAC and then demux to a bunch of S&Hs.  
> 
> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel DACs? 

One thing to consider is, are all the CVs needed in one place/on one PCB, or do you need them scattered across a larger device (say, a modular synth)? In the latter case you could place the DACs where the CVs are needed and feed them with a common I2C or whatever bus. Much less wiring effort required, this could probably outweigh the lower cost of a DAC+S&H solution.

I?m curious, which CV needs 12 or even 16 bits of resolution with an update rate of a few kHz at the same time?

Ingo


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From mbryant at futurehorizons.com  Fri Dec  8 20:45:01 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 19:45:01 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBXNf9q+30JbVP_kbAVrybJWdgmHZLhOU_RN=hBAYKz6XQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAP92RBXNf9q+30JbVP_kbAVrybJWdgmHZLhOU_RN=hBAYKz6XQ@mail.gmail.com>
Message-ID: <CWLP265MB713296E4D4AA25A5AB3272FBDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

I was getting 18 bit accuracy back in early 80s using this technique using LS-TTL and discrete transistors.  I'm sure one could do even better now with better components.


________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Mattias Rickardsson <mr at analogue.org>
Sent: 08 December 2023 16:15
To: Tom Wiltshire <tom at electricdruid.net>
Cc: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

But what about potential problems and errors from

1 - the non-constant number of transitions per time?

2 - the non-constant frequency of the pulse wave?

/mr


On Fri, 8 Dec 2023 at 17:02, Tom Wiltshire <tom at electricdruid.net<mailto:tom at electricdruid.net>> wrote:


On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org<mailto:synth-diy at synth-diy.org>> wrote:

If PDM means PWM with bit-reversal before the comparison (such as Richie
describes), then it does indeed lock you into a lower sampling rate, and
that's one reason I skipped describing *that* technique.  But PWM with
bit-reversal seems not to be what you mean when you say PDM.

That's not what I meant when I said PDM, certainly.

The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.

Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.

HTH,
Tom

==================
       Electric Druid
Synth & Stompbox DIY
==================

_______________________________________________
Synth-diy mailing list
Synth-diy at synth-diy.org<mailto:Synth-diy at synth-diy.org>
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From cheater00social at gmail.com  Fri Dec  8 21:30:40 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Fri, 8 Dec 2023 21:30:40 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
Message-ID: <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>

On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>
>
>
> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>
> If PDM means PWM with bit-reversal before the comparison (such as Richie
> describes), then it does indeed lock you into a lower sampling rate, and
> that's one reason I skipped describing *that* technique.  But PWM with
> bit-reversal seems not to be what you mean when you say PDM.
>
>
> That's not what I meant when I said PDM, certainly.
>
> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>
> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>
> HTH,
> Tom
>

I've read this a few times but I'm struggling to understand what's
going on. Can someone type out an algorithm or something like that?
Would appreciate it a lot. Thanks.



From tom at electricdruid.net  Fri Dec  8 22:07:55 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Fri, 8 Dec 2023 21:07:55 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
Message-ID: <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>



> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> 
> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
>> 
>> 
>> 
>> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>> 
>> If PDM means PWM with bit-reversal before the comparison (such as Richie
>> describes), then it does indeed lock you into a lower sampling rate, and
>> that's one reason I skipped describing *that* technique.  But PWM with
>> bit-reversal seems not to be what you mean when you say PDM.
>> 
>> 
>> That's not what I meant when I said PDM, certainly.
>> 
>> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>> 
>> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
>> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
>> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>> 
>> HTH,
>> Tom
>> 
> 
> I've read this a few times but I'm struggling to understand what's
> going on. Can someone type out an algorithm or something like that?
> Would appreciate it a lot. Thanks.

Ok, it'd look something like this:

phase: 16-bit variable (for example)
freq: 16-bit variable (same as phase)

So we do:

// Increment phase accumulator
phase = phase + freq

// Did phase wraparound?
If (phase>65535) {				// There are probably better ways to do this test, if it's even required.
	// Ok, phase wrapped
	phase = phase % 65536
	// output a pulse a single clock in length
	<this is implementation dependent!>
}

All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.


There's a page about NCOs in general on my website:

https://electricdruid.net/direct-digital-synthesis/

HTH,
Tom


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From cheater00social at gmail.com  Fri Dec  8 22:18:21 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Fri, 8 Dec 2023 22:18:21 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
Message-ID: <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>

I don't get it. Most of the algorithm is missing.

On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>
>
>
> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
>
> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>
>
>
>
> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>
> If PDM means PWM with bit-reversal before the comparison (such as Richie
> describes), then it does indeed lock you into a lower sampling rate, and
> that's one reason I skipped describing *that* technique.  But PWM with
> bit-reversal seems not to be what you mean when you say PDM.
>
>
> That's not what I meant when I said PDM, certainly.
>
> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>
> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>
> HTH,
> Tom
>
>
> I've read this a few times but I'm struggling to understand what's
> going on. Can someone type out an algorithm or something like that?
> Would appreciate it a lot. Thanks.
>
>
> Ok, it'd look something like this:
>
> phase: 16-bit variable (for example)
> freq: 16-bit variable (same as phase)
>
> So we do:
>
> // Increment phase accumulator
> phase = phase + freq
>
> // Did phase wraparound?
> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> // Ok, phase wrapped
> phase = phase % 65536
> // output a pulse a single clock in length
> <this is implementation dependent!>
> }
>
> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
>
>
> There's a page about NCOs in general on my website:
>
> https://electricdruid.net/direct-digital-synthesis/
>
> HTH,
> Tom
>
>



From tom at electricdruid.net  Fri Dec  8 22:41:15 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Fri, 8 Dec 2023 21:41:15 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
Message-ID: <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>

Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.

Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!

If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.


> On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> 
> I don't get it. Most of the algorithm is missing.
> 
> On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>> 
>> 
>> 
>> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
>> 
>> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>> 
>> 
>> 
>> 
>> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>> 
>> If PDM means PWM with bit-reversal before the comparison (such as Richie
>> describes), then it does indeed lock you into a lower sampling rate, and
>> that's one reason I skipped describing *that* technique.  But PWM with
>> bit-reversal seems not to be what you mean when you say PDM.
>> 
>> 
>> That's not what I meant when I said PDM, certainly.
>> 
>> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>> 
>> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
>> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
>> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>> 
>> HTH,
>> Tom
>> 
>> 
>> I've read this a few times but I'm struggling to understand what's
>> going on. Can someone type out an algorithm or something like that?
>> Would appreciate it a lot. Thanks.
>> 
>> 
>> Ok, it'd look something like this:
>> 
>> phase: 16-bit variable (for example)
>> freq: 16-bit variable (same as phase)
>> 
>> So we do:
>> 
>> // Increment phase accumulator
>> phase = phase + freq
>> 
>> // Did phase wraparound?
>> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
>> // Ok, phase wrapped
>> phase = phase % 65536
>> // output a pulse a single clock in length
>> <this is implementation dependent!>
>> }
>> 
>> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
>> 
>> 
>> There's a page about NCOs in general on my website:
>> 
>> https://electricdruid.net/direct-digital-synthesis/
>> 
>> HTH,
>> Tom
>> 
>> 




From mr at analogue.org  Fri Dec  8 23:36:04 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Fri, 8 Dec 2023 23:36:04 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <FE2F347E-93AB-46B9-A9A7-CC9C4273D394@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAP92RBXNf9q+30JbVP_kbAVrybJWdgmHZLhOU_RN=hBAYKz6XQ@mail.gmail.com>
 <FE2F347E-93AB-46B9-A9A7-CC9C4273D394@electricdruid.net>
Message-ID: <CAP92RBUVhY5OhoL9cJwj1CPTyyySzaqUdqS7DS9n88g6T+RbsQ@mail.gmail.com>

On 8 Dec 2023, at 16:15, Mattias Rickardsson <mr at analogue.org> wrote:
> But what about potential problems and errors from
> 1 - the non-constant number of transitions per time?
> 2 - the non-constant frequency of the pulse wave?


On Fri, 8 Dec 2023 at 19:16, Tom Wiltshire <tom at electricdruid.net> wrote:

> What about them?!?
> No-one said this was *perfect*, only quick and cheap. Two out of three
> isn't bad!
> ;)
>

:-D


> Slightly more seriously (1) averages out over time, (2) is only a problem
> when the frequency gets lower at the extremes. Stay away form the extremes
> and you avoid this problem.
>

Sorry for my short descriptions. I was more thinking
1 - if there are transitions more often (like in mid-range of values), then
the difference between up-edge and down-edge contributes more to the value,
and I'd expect it to result in some nonlinearity - not sure how large - and
also some noise. PWM on the contrary is inherently linear.
2 - frequencies above audible range can result in tones in the audio band
due to different nonlinear/disturbance phenomena... is it safe to have
dozens of them twittring around up there? :-)

/mr




>
>
> On 8 Dec 2023, at 16:15, Mattias Rickardsson <mr at analogue.org> wrote:
>
> But what about potential problems and errors from
>
> 1 - the non-constant number of transitions per time?
>
> 2 - the non-constant frequency of the pulse wave?
>
> /mr
>
>
> On Fri, 8 Dec 2023 at 17:02, Tom Wiltshire <tom at electricdruid.net> wrote:
>
>>
>>
>> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
>> synth-diy at synth-diy.org> wrote:
>>
>> If PDM means PWM with bit-reversal before the comparison (such as Richie
>> describes), then it does indeed lock you into a lower sampling rate, and
>> that's one reason I skipped describing *that* technique.  But PWM with
>> bit-reversal seems not to be what you mean when you say PDM.
>>
>>
>> That's not what I meant when I said PDM, certainly.
>>
>> The way I generated it is using an NCO. The NCO generates a single-shot
>> output pulse everytime the phase accumulator wraps.
>>
>> Now consider what happens with a simple 8-bit NCO. If our frequency
>> increment is 2, for example, we get a single output pulse every 128 clocks,
>> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
>> not next to each other like PWM. The output frequency would be (clock
>> frequency / 128) in this situation.
>> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses
>> per 256 clocks, and again, they're nicely spaced out. The output frequency
>> is now up to (clock /32) so there's been a big improvement, just by getting
>> away from those extreme values a little bit.
>> As the increment climbs, the accumulator wraps more and more often. At
>> freq=128, every other clock is an output and we reach our maximum output
>> frequency of (clock/2). As the increment goes above half, we start staying
>> high for more than a single pulse, and the waveform effectively turns the
>> other way up and we get a mirror image of the effect we've seen from 0-128.
>>
>> HTH,
>> Tom
>>
>> ==================
>>        Electric Druid
>> Synth & Stompbox DIY
>> ==================
>>
>> _______________________________________________
>> Synth-diy mailing list
>> Synth-diy at synth-diy.org
>> http://synth-diy.org/mailman/listinfo/synth-diy
>> Selling or trading? Use marketplace at synth-diy.org
>>
>
>
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From mr at analogue.org  Fri Dec  8 23:40:16 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Fri, 8 Dec 2023 23:40:16 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <82054732-D5D5-42DD-ACB2-4BFF356E6FE3@gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <82054732-D5D5-42DD-ACB2-4BFF356E6FE3@gmail.com>
Message-ID: <CAP92RBXY_qicyDDuTGLScacLH-PnCU+Ypg-njczApHCLTBV66w@mail.gmail.com>

On Fri, 8 Dec 2023 at 19:55, Ingo Debus via Synth-diy <
synth-diy at synth-diy.org> wrote:

>
> I?m curious, which CV needs 12 or even 16 bits of resolution with an
> update rate of a few kHz at the same time?
>

CV control of VCO frequencies. I'd definitely prefer to have them modulated
in audio range *and* have the inter-VCO beating under tight control (sub-Hz
precision needed here, even if the human hearing doesn't discriminate
single-VCO pitches anywhere near as accurately).

/mr
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From ben.pi.bradley at gmail.com  Fri Dec  8 23:44:04 2023
From: ben.pi.bradley at gmail.com (Ben Bradley)
Date: Fri, 8 Dec 2023 17:44:04 -0500
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
Message-ID: <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>

I get it. Firstly, it's an NCO:
https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
>From that, the thing gives a fixed-width pulse (a little shorter than
one cycle at the max frequency) for every cycle of output, thus the
average voltage (the output of a low-pass filter) is proportional to
frequency.

On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
>
> Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
>
> Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
>
> If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
>
>
> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> >
> > I don't get it. Most of the algorithm is missing.
> >
> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> >>
> >>
> >>
> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> >>
> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> >>
> >>
> >>
> >>
> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> >>
> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> >> describes), then it does indeed lock you into a lower sampling rate, and
> >> that's one reason I skipped describing *that* technique.  But PWM with
> >> bit-reversal seems not to be what you mean when you say PDM.
> >>
> >>
> >> That's not what I meant when I said PDM, certainly.
> >>
> >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> >>
> >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> >>
> >> HTH,
> >> Tom
> >>
> >>
> >> I've read this a few times but I'm struggling to understand what's
> >> going on. Can someone type out an algorithm or something like that?
> >> Would appreciate it a lot. Thanks.
> >>
> >>
> >> Ok, it'd look something like this:
> >>
> >> phase: 16-bit variable (for example)
> >> freq: 16-bit variable (same as phase)
> >>
> >> So we do:
> >>
> >> // Increment phase accumulator
> >> phase = phase + freq
> >>
> >> // Did phase wraparound?
> >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> >> // Ok, phase wrapped
> >> phase = phase % 65536
> >> // output a pulse a single clock in length
> >> <this is implementation dependent!>
> >> }
> >>
> >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> >>
> >>
> >> There's a page about NCOs in general on my website:
> >>
> >> https://electricdruid.net/direct-digital-synthesis/
> >>
> >> HTH,
> >> Tom
> >>
> >>
>
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From cheater00social at gmail.com  Fri Dec  8 23:49:55 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Fri, 8 Dec 2023 23:49:55 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
Message-ID: <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>

Does that mean the final output voltage (after the reconstruction
filter) is proportional to the freq value in the algorithm Tom posted
above? So you set the desired output value by setting the freq
variable?

On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
<synth-diy at synth-diy.org> wrote:
>
> I get it. Firstly, it's an NCO:
> https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> From that, the thing gives a fixed-width pulse (a little shorter than
> one cycle at the max frequency) for every cycle of output, thus the
> average voltage (the output of a low-pass filter) is proportional to
> frequency.
>
> On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> >
> > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> >
> > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> >
> > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> >
> >
> > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > >
> > > I don't get it. Most of the algorithm is missing.
> > >
> > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > >>
> > >>
> > >>
> > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > >>
> > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > >>
> > >>
> > >>
> > >>
> > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > >>
> > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > >> describes), then it does indeed lock you into a lower sampling rate, and
> > >> that's one reason I skipped describing *that* technique.  But PWM with
> > >> bit-reversal seems not to be what you mean when you say PDM.
> > >>
> > >>
> > >> That's not what I meant when I said PDM, certainly.
> > >>
> > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > >>
> > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > >>
> > >> HTH,
> > >> Tom
> > >>
> > >>
> > >> I've read this a few times but I'm struggling to understand what's
> > >> going on. Can someone type out an algorithm or something like that?
> > >> Would appreciate it a lot. Thanks.
> > >>
> > >>
> > >> Ok, it'd look something like this:
> > >>
> > >> phase: 16-bit variable (for example)
> > >> freq: 16-bit variable (same as phase)
> > >>
> > >> So we do:
> > >>
> > >> // Increment phase accumulator
> > >> phase = phase + freq
> > >>
> > >> // Did phase wraparound?
> > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > >> // Ok, phase wrapped
> > >> phase = phase % 65536
> > >> // output a pulse a single clock in length
> > >> <this is implementation dependent!>
> > >> }
> > >>
> > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > >>
> > >>
> > >> There's a page about NCOs in general on my website:
> > >>
> > >> https://electricdruid.net/direct-digital-synthesis/
> > >>
> > >> HTH,
> > >> Tom
> > >>
> > >>
> >
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From mbryant at futurehorizons.com  Sat Dec  9 00:09:07 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Fri, 8 Dec 2023 23:09:07 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
Message-ID: <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.


________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
Sent: 08 December 2023 22:49
To: Ben Bradley <ben.pi.bradley at gmail.com>
Cc: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

Does that mean the final output voltage (after the reconstruction
filter) is proportional to the freq value in the algorithm Tom posted
above? So you set the desired output value by setting the freq
variable?

On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
<synth-diy at synth-diy.org> wrote:
>
> I get it. Firstly, it's an NCO:
> https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> From that, the thing gives a fixed-width pulse (a little shorter than
> one cycle at the max frequency) for every cycle of output, thus the
> average voltage (the output of a low-pass filter) is proportional to
> frequency.
>
> On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> >
> > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> >
> > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> >
> > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> >
> >
> > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > >
> > > I don't get it. Most of the algorithm is missing.
> > >
> > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > >>
> > >>
> > >>
> > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > >>
> > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > >>
> > >>
> > >>
> > >>
> > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > >>
> > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > >> describes), then it does indeed lock you into a lower sampling rate, and
> > >> that's one reason I skipped describing *that* technique.  But PWM with
> > >> bit-reversal seems not to be what you mean when you say PDM.
> > >>
> > >>
> > >> That's not what I meant when I said PDM, certainly.
> > >>
> > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > >>
> > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > >>
> > >> HTH,
> > >> Tom
> > >>
> > >>
> > >> I've read this a few times but I'm struggling to understand what's
> > >> going on. Can someone type out an algorithm or something like that?
> > >> Would appreciate it a lot. Thanks.
> > >>
> > >>
> > >> Ok, it'd look something like this:
> > >>
> > >> phase: 16-bit variable (for example)
> > >> freq: 16-bit variable (same as phase)
> > >>
> > >> So we do:
> > >>
> > >> // Increment phase accumulator
> > >> phase = phase + freq
> > >>
> > >> // Did phase wraparound?
> > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > >> // Ok, phase wrapped
> > >> phase = phase % 65536
> > >> // output a pulse a single clock in length
> > >> <this is implementation dependent!>
> > >> }
> > >>
> > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > >>
> > >>
> > >> There's a page about NCOs in general on my website:
> > >>
> > >> https://electricdruid.net/direct-digital-synthesis/
> > >>
> > >> HTH,
> > >> Tom
> > >>
> > >>
> >
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org

_______________________________________________
Synth-diy mailing list
Synth-diy at synth-diy.org
http://synth-diy.org/mailman/listinfo/synth-diy
Selling or trading? Use marketplace at synth-diy.org
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From cheater00social at gmail.com  Sat Dec  9 00:18:24 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sat, 9 Dec 2023 00:18:24 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
 <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>

Right, that makes sense. Thanks a lot guys!

So what was that about using jitter? Is that to make the integrator
"more perfect"?

If instead of using single pulses you used BLEPs or something similar,
could that help as well? Or some sort of linear interpolation that
outputs two samples in succession (so that their sum is 65535) in some
smart way ...


On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
>
>
> ________________________________
> From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> Sent: 08 December 2023 22:49
> To: Ben Bradley <ben.pi.bradley at gmail.com>
> Cc: SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> Does that mean the final output voltage (after the reconstruction
> filter) is proportional to the freq value in the algorithm Tom posted
> above? So you set the desired output value by setting the freq
> variable?
>
> On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> <synth-diy at synth-diy.org> wrote:
> >
> > I get it. Firstly, it's an NCO:
> > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > From that, the thing gives a fixed-width pulse (a little shorter than
> > one cycle at the max frequency) for every cycle of output, thus the
> > average voltage (the output of a low-pass filter) is proportional to
> > frequency.
> >
> > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > >
> > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > >
> > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > >
> > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > >
> > >
> > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > >
> > > > I don't get it. Most of the algorithm is missing.
> > > >
> > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >>
> > > >>
> > > >>
> > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > >>
> > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >>
> > > >>
> > > >>
> > > >>
> > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > >>
> > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > >>
> > > >>
> > > >> That's not what I meant when I said PDM, certainly.
> > > >>
> > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > >>
> > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > >>
> > > >> HTH,
> > > >> Tom
> > > >>
> > > >>
> > > >> I've read this a few times but I'm struggling to understand what's
> > > >> going on. Can someone type out an algorithm or something like that?
> > > >> Would appreciate it a lot. Thanks.
> > > >>
> > > >>
> > > >> Ok, it'd look something like this:
> > > >>
> > > >> phase: 16-bit variable (for example)
> > > >> freq: 16-bit variable (same as phase)
> > > >>
> > > >> So we do:
> > > >>
> > > >> // Increment phase accumulator
> > > >> phase = phase + freq
> > > >>
> > > >> // Did phase wraparound?
> > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > >> // Ok, phase wrapped
> > > >> phase = phase % 65536
> > > >> // output a pulse a single clock in length
> > > >> <this is implementation dependent!>
> > > >> }
> > > >>
> > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > >>
> > > >>
> > > >> There's a page about NCOs in general on my website:
> > > >>
> > > >> https://electricdruid.net/direct-digital-synthesis/
> > > >>
> > > >> HTH,
> > > >> Tom
> > > >>
> > > >>
> > >
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From mbryant at futurehorizons.com  Sat Dec  9 02:06:38 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sat, 9 Dec 2023 01:06:38 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
 <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>
Message-ID: <CWLP265MB71326C36A8953C67AA0AC7BDDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.

The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.


________________________________
From: cheater cheater <cheater00social at gmail.com>
Sent: 08 December 2023 23:18
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

Right, that makes sense. Thanks a lot guys!

So what was that about using jitter? Is that to make the integrator
"more perfect"?

If instead of using single pulses you used BLEPs or something similar,
could that help as well? Or some sort of linear interpolation that
outputs two samples in succession (so that their sum is 65535) in some
smart way ...


On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
>
>
> ________________________________
> From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> Sent: 08 December 2023 22:49
> To: Ben Bradley <ben.pi.bradley at gmail.com>
> Cc: SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> Does that mean the final output voltage (after the reconstruction
> filter) is proportional to the freq value in the algorithm Tom posted
> above? So you set the desired output value by setting the freq
> variable?
>
> On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> <synth-diy at synth-diy.org> wrote:
> >
> > I get it. Firstly, it's an NCO:
> > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > From that, the thing gives a fixed-width pulse (a little shorter than
> > one cycle at the max frequency) for every cycle of output, thus the
> > average voltage (the output of a low-pass filter) is proportional to
> > frequency.
> >
> > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > >
> > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > >
> > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > >
> > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > >
> > >
> > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > >
> > > > I don't get it. Most of the algorithm is missing.
> > > >
> > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >>
> > > >>
> > > >>
> > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > >>
> > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >>
> > > >>
> > > >>
> > > >>
> > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > >>
> > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > >>
> > > >>
> > > >> That's not what I meant when I said PDM, certainly.
> > > >>
> > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > >>
> > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > >>
> > > >> HTH,
> > > >> Tom
> > > >>
> > > >>
> > > >> I've read this a few times but I'm struggling to understand what's
> > > >> going on. Can someone type out an algorithm or something like that?
> > > >> Would appreciate it a lot. Thanks.
> > > >>
> > > >>
> > > >> Ok, it'd look something like this:
> > > >>
> > > >> phase: 16-bit variable (for example)
> > > >> freq: 16-bit variable (same as phase)
> > > >>
> > > >> So we do:
> > > >>
> > > >> // Increment phase accumulator
> > > >> phase = phase + freq
> > > >>
> > > >> // Did phase wraparound?
> > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > >> // Ok, phase wrapped
> > > >> phase = phase % 65536
> > > >> // output a pulse a single clock in length
> > > >> <this is implementation dependent!>
> > > >> }
> > > >>
> > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > >>
> > > >>
> > > >> There's a page about NCOs in general on my website:
> > > >>
> > > >> https://electricdruid.net/direct-digital-synthesis/
> > > >>
> > > >> HTH,
> > > >> Tom
> > > >>
> > > >>
> > >
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
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From cheater00social at gmail.com  Sat Dec  9 02:25:30 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sat, 9 Dec 2023 02:25:30 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB71326C36A8953C67AA0AC7BDDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
 <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>
 <CWLP265MB71326C36A8953C67AA0AC7BDDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAGn5V-_zjt4W_5LXZGGsx7SoXpGmYGw-wceAhv==fKSPOUHNQg@mail.gmail.com>

That's really good performance. What do you think of its medium (~1
Hz) and long term (~0.01Hz and less) drift performance?

What do you think makes a good integrator in such a case?

On Sat, Dec 9, 2023 at 2:06?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.
>
> The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.
>
>
> ________________________________
> From: cheater cheater <cheater00social at gmail.com>
> Sent: 08 December 2023 23:18
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> Right, that makes sense. Thanks a lot guys!
>
> So what was that about using jitter? Is that to make the integrator
> "more perfect"?
>
> If instead of using single pulses you used BLEPs or something similar,
> could that help as well? Or some sort of linear interpolation that
> outputs two samples in succession (so that their sum is 65535) in some
> smart way ...
>
>
> On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> >
> > Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
> >
> >
> > ________________________________
> > From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> > Sent: 08 December 2023 22:49
> > To: Ben Bradley <ben.pi.bradley at gmail.com>
> > Cc: SDIY <synth-diy at synth-diy.org>
> > Subject: Re: [sdiy] Generating a large number of CV outputs
> >
> > Does that mean the final output voltage (after the reconstruction
> > filter) is proportional to the freq value in the algorithm Tom posted
> > above? So you set the desired output value by setting the freq
> > variable?
> >
> > On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> > <synth-diy at synth-diy.org> wrote:
> > >
> > > I get it. Firstly, it's an NCO:
> > > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > > From that, the thing gives a fixed-width pulse (a little shorter than
> > > one cycle at the max frequency) for every cycle of output, thus the
> > > average voltage (the output of a low-pass filter) is proportional to
> > > frequency.
> > >
> > > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >
> > > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > > >
> > > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > > >
> > > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > > >
> > > >
> > > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > > >
> > > > > I don't get it. Most of the algorithm is missing.
> > > > >
> > > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >>
> > > > >>
> > > > >>
> > > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > > >>
> > > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >>
> > > > >>
> > > > >>
> > > > >>
> > > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > > >>
> > > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > > >>
> > > > >>
> > > > >> That's not what I meant when I said PDM, certainly.
> > > > >>
> > > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > > >>
> > > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > > >>
> > > > >> HTH,
> > > > >> Tom
> > > > >>
> > > > >>
> > > > >> I've read this a few times but I'm struggling to understand what's
> > > > >> going on. Can someone type out an algorithm or something like that?
> > > > >> Would appreciate it a lot. Thanks.
> > > > >>
> > > > >>
> > > > >> Ok, it'd look something like this:
> > > > >>
> > > > >> phase: 16-bit variable (for example)
> > > > >> freq: 16-bit variable (same as phase)
> > > > >>
> > > > >> So we do:
> > > > >>
> > > > >> // Increment phase accumulator
> > > > >> phase = phase + freq
> > > > >>
> > > > >> // Did phase wraparound?
> > > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > > >> // Ok, phase wrapped
> > > > >> phase = phase % 65536
> > > > >> // output a pulse a single clock in length
> > > > >> <this is implementation dependent!>
> > > > >> }
> > > > >>
> > > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > > >>
> > > > >>
> > > > >> There's a page about NCOs in general on my website:
> > > > >>
> > > > >> https://electricdruid.net/direct-digital-synthesis/
> > > > >>
> > > > >> HTH,
> > > > >> Tom
> > > > >>
> > > > >>
> > > >
> > > >
> > > > _______________________________________________
> > > > Synth-diy mailing list
> > > > Synth-diy at synth-diy.org
> > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > Selling or trading? Use marketplace at synth-diy.org
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org



From mbryant at futurehorizons.com  Sat Dec  9 02:35:05 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sat, 9 Dec 2023 01:35:05 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-_zjt4W_5LXZGGsx7SoXpGmYGw-wceAhv==fKSPOUHNQg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
 <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>
 <CWLP265MB71326C36A8953C67AA0AC7BDDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-_zjt4W_5LXZGGsx7SoXpGmYGw-wceAhv==fKSPOUHNQg@mail.gmail.com>
Message-ID: <CWLP265MB71329478D0286F52127DE90BDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Drift is down to the crystal osc used - 25ppm ?

Lots of better opamps nowadays.  I think I used the Harris 2605 in those days which was as good as it got back then, but loads far better ones around now.  As indeed are there better capacitors.


________________________________
From: cheater cheater <cheater00social at gmail.com>
Sent: 09 December 2023 01:25
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

That's really good performance. What do you think of its medium (~1
Hz) and long term (~0.01Hz and less) drift performance?

What do you think makes a good integrator in such a case?

On Sat, Dec 9, 2023 at 2:06?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.
>
> The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.
>
>
> ________________________________
> From: cheater cheater <cheater00social at gmail.com>
> Sent: 08 December 2023 23:18
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> Right, that makes sense. Thanks a lot guys!
>
> So what was that about using jitter? Is that to make the integrator
> "more perfect"?
>
> If instead of using single pulses you used BLEPs or something similar,
> could that help as well? Or some sort of linear interpolation that
> outputs two samples in succession (so that their sum is 65535) in some
> smart way ...
>
>
> On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> >
> > Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
> >
> >
> > ________________________________
> > From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> > Sent: 08 December 2023 22:49
> > To: Ben Bradley <ben.pi.bradley at gmail.com>
> > Cc: SDIY <synth-diy at synth-diy.org>
> > Subject: Re: [sdiy] Generating a large number of CV outputs
> >
> > Does that mean the final output voltage (after the reconstruction
> > filter) is proportional to the freq value in the algorithm Tom posted
> > above? So you set the desired output value by setting the freq
> > variable?
> >
> > On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> > <synth-diy at synth-diy.org> wrote:
> > >
> > > I get it. Firstly, it's an NCO:
> > > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > > From that, the thing gives a fixed-width pulse (a little shorter than
> > > one cycle at the max frequency) for every cycle of output, thus the
> > > average voltage (the output of a low-pass filter) is proportional to
> > > frequency.
> > >
> > > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > > >
> > > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > > >
> > > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > > >
> > > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > > >
> > > >
> > > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > > >
> > > > > I don't get it. Most of the algorithm is missing.
> > > > >
> > > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >>
> > > > >>
> > > > >>
> > > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > > >>
> > > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >>
> > > > >>
> > > > >>
> > > > >>
> > > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > > >>
> > > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > > >>
> > > > >>
> > > > >> That's not what I meant when I said PDM, certainly.
> > > > >>
> > > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > > >>
> > > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > > >>
> > > > >> HTH,
> > > > >> Tom
> > > > >>
> > > > >>
> > > > >> I've read this a few times but I'm struggling to understand what's
> > > > >> going on. Can someone type out an algorithm or something like that?
> > > > >> Would appreciate it a lot. Thanks.
> > > > >>
> > > > >>
> > > > >> Ok, it'd look something like this:
> > > > >>
> > > > >> phase: 16-bit variable (for example)
> > > > >> freq: 16-bit variable (same as phase)
> > > > >>
> > > > >> So we do:
> > > > >>
> > > > >> // Increment phase accumulator
> > > > >> phase = phase + freq
> > > > >>
> > > > >> // Did phase wraparound?
> > > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > > >> // Ok, phase wrapped
> > > > >> phase = phase % 65536
> > > > >> // output a pulse a single clock in length
> > > > >> <this is implementation dependent!>
> > > > >> }
> > > > >>
> > > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > > >>
> > > > >>
> > > > >> There's a page about NCOs in general on my website:
> > > > >>
> > > > >> https://electricdruid.net/direct-digital-synthesis/
> > > > >>
> > > > >> HTH,
> > > > >> Tom
> > > > >>
> > > > >>
> > > >
> > > >
> > > > _______________________________________________
> > > > Synth-diy mailing list
> > > > Synth-diy at synth-diy.org
> > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > Selling or trading? Use marketplace at synth-diy.org
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
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From cheater00social at gmail.com  Sat Dec  9 02:46:15 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sat, 9 Dec 2023 02:46:15 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB71329478D0286F52127DE90BDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
 <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>
 <CWLP265MB71326C36A8953C67AA0AC7BDDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-_zjt4W_5LXZGGsx7SoXpGmYGw-wceAhv==fKSPOUHNQg@mail.gmail.com>
 <CWLP265MB71329478D0286F52127DE90BDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAGn5V--3ve-9PY62uy5s8pNSZizt6qSWsL4kx7BpDi_9PODGvA@mail.gmail.com>

hmm... the need for external, high quality op amps and board real
estate does raise the cost per channel significantly, doesn't it...

On Sat, Dec 9, 2023 at 2:35?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> Drift is down to the crystal osc used - 25ppm ?
>
> Lots of better opamps nowadays.  I think I used the Harris 2605 in those days which was as good as it got back then, but loads far better ones around now.  As indeed are there better capacitors.
>
>
> ________________________________
> From: cheater cheater <cheater00social at gmail.com>
> Sent: 09 December 2023 01:25
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> That's really good performance. What do you think of its medium (~1
> Hz) and long term (~0.01Hz and less) drift performance?
>
> What do you think makes a good integrator in such a case?
>
> On Sat, Dec 9, 2023 at 2:06?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> >
> > No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.
> >
> > The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.
> >
> >
> > ________________________________
> > From: cheater cheater <cheater00social at gmail.com>
> > Sent: 08 December 2023 23:18
> > To: Mike Bryant <mbryant at futurehorizons.com>
> > Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> > Subject: Re: [sdiy] Generating a large number of CV outputs
> >
> > Right, that makes sense. Thanks a lot guys!
> >
> > So what was that about using jitter? Is that to make the integrator
> > "more perfect"?
> >
> > If instead of using single pulses you used BLEPs or something similar,
> > could that help as well? Or some sort of linear interpolation that
> > outputs two samples in succession (so that their sum is 65535) in some
> > smart way ...
> >
> >
> > On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> > >
> > > Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
> > >
> > >
> > > ________________________________
> > > From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> > > Sent: 08 December 2023 22:49
> > > To: Ben Bradley <ben.pi.bradley at gmail.com>
> > > Cc: SDIY <synth-diy at synth-diy.org>
> > > Subject: Re: [sdiy] Generating a large number of CV outputs
> > >
> > > Does that mean the final output voltage (after the reconstruction
> > > filter) is proportional to the freq value in the algorithm Tom posted
> > > above? So you set the desired output value by setting the freq
> > > variable?
> > >
> > > On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> > > <synth-diy at synth-diy.org> wrote:
> > > >
> > > > I get it. Firstly, it's an NCO:
> > > > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > > > From that, the thing gives a fixed-width pulse (a little shorter than
> > > > one cycle at the max frequency) for every cycle of output, thus the
> > > > average voltage (the output of a low-pass filter) is proportional to
> > > > frequency.
> > > >
> > > > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >
> > > > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > > > >
> > > > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > > > >
> > > > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > > > >
> > > > >
> > > > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > > > >
> > > > > > I don't get it. Most of the algorithm is missing.
> > > > > >
> > > > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > > > >>
> > > > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > > > >>
> > > > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > > > >>
> > > > > >>
> > > > > >> That's not what I meant when I said PDM, certainly.
> > > > > >>
> > > > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > > > >>
> > > > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > > > >>
> > > > > >> HTH,
> > > > > >> Tom
> > > > > >>
> > > > > >>
> > > > > >> I've read this a few times but I'm struggling to understand what's
> > > > > >> going on. Can someone type out an algorithm or something like that?
> > > > > >> Would appreciate it a lot. Thanks.
> > > > > >>
> > > > > >>
> > > > > >> Ok, it'd look something like this:
> > > > > >>
> > > > > >> phase: 16-bit variable (for example)
> > > > > >> freq: 16-bit variable (same as phase)
> > > > > >>
> > > > > >> So we do:
> > > > > >>
> > > > > >> // Increment phase accumulator
> > > > > >> phase = phase + freq
> > > > > >>
> > > > > >> // Did phase wraparound?
> > > > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > > > >> // Ok, phase wrapped
> > > > > >> phase = phase % 65536
> > > > > >> // output a pulse a single clock in length
> > > > > >> <this is implementation dependent!>
> > > > > >> }
> > > > > >>
> > > > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > > > >>
> > > > > >>
> > > > > >> There's a page about NCOs in general on my website:
> > > > > >>
> > > > > >> https://electricdruid.net/direct-digital-synthesis/
> > > > > >>
> > > > > >> HTH,
> > > > > >> Tom
> > > > > >>
> > > > > >>
> > > > >
> > > > >
> > > > > _______________________________________________
> > > > > Synth-diy mailing list
> > > > > Synth-diy at synth-diy.org
> > > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > > Selling or trading? Use marketplace at synth-diy.org
> > > >
> > > > _______________________________________________
> > > > Synth-diy mailing list
> > > > Synth-diy at synth-diy.org
> > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > Selling or trading? Use marketplace at synth-diy.org
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org



From mbryant at futurehorizons.com  Sat Dec  9 03:30:48 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sat, 9 Dec 2023 02:30:48 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V--3ve-9PY62uy5s8pNSZizt6qSWsL4kx7BpDi_9PODGvA@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CA+wjhVtHKY8Taw--h+jE3px24+5Wc+XHyZSkwXT4+58j7J=YKQ@mail.gmail.com>
 <CAGn5V-_SkF8hF2JpZd511fp7bCWMvqMhN6cG=6byB0g9DF5C5A@mail.gmail.com>
 <CWLP265MB71326868E777A21318A6574DDB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V--81NFTNj5dD8bbmAiLdSKoyHGd+POqffyP4cK-6G=WQw@mail.gmail.com>
 <CWLP265MB71326C36A8953C67AA0AC7BDDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-_zjt4W_5LXZGGsx7SoXpGmYGw-wceAhv==fKSPOUHNQg@mail.gmail.com>
 <CWLP265MB71329478D0286F52127DE90BDB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V--3ve-9PY62uy5s8pNSZizt6qSWsL4kx7BpDi_9PODGvA@mail.gmail.com>
Message-ID: <CWLP265MB71325CC186A1706F1636A9B3DB89A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

No idea - I went all digital synths in 1986 :-)


________________________________
From: cheater cheater <cheater00social at gmail.com>
Sent: 09 December 2023 01:46
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

hmm... the need for external, high quality op amps and board real
estate does raise the cost per channel significantly, doesn't it...

On Sat, Dec 9, 2023 at 2:35?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> Drift is down to the crystal osc used - 25ppm ?
>
> Lots of better opamps nowadays.  I think I used the Harris 2605 in those days which was as good as it got back then, but loads far better ones around now.  As indeed are there better capacitors.
>
>
> ________________________________
> From: cheater cheater <cheater00social at gmail.com>
> Sent: 09 December 2023 01:25
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> That's really good performance. What do you think of its medium (~1
> Hz) and long term (~0.01Hz and less) drift performance?
>
> What do you think makes a good integrator in such a case?
>
> On Sat, Dec 9, 2023 at 2:06?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> >
> > No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.
> >
> > The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.
> >
> >
> > ________________________________
> > From: cheater cheater <cheater00social at gmail.com>
> > Sent: 08 December 2023 23:18
> > To: Mike Bryant <mbryant at futurehorizons.com>
> > Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> > Subject: Re: [sdiy] Generating a large number of CV outputs
> >
> > Right, that makes sense. Thanks a lot guys!
> >
> > So what was that about using jitter? Is that to make the integrator
> > "more perfect"?
> >
> > If instead of using single pulses you used BLEPs or something similar,
> > could that help as well? Or some sort of linear interpolation that
> > outputs two samples in succession (so that their sum is 65535) in some
> > smart way ...
> >
> >
> > On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> > >
> > > Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
> > >
> > >
> > > ________________________________
> > > From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> > > Sent: 08 December 2023 22:49
> > > To: Ben Bradley <ben.pi.bradley at gmail.com>
> > > Cc: SDIY <synth-diy at synth-diy.org>
> > > Subject: Re: [sdiy] Generating a large number of CV outputs
> > >
> > > Does that mean the final output voltage (after the reconstruction
> > > filter) is proportional to the freq value in the algorithm Tom posted
> > > above? So you set the desired output value by setting the freq
> > > variable?
> > >
> > > On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> > > <synth-diy at synth-diy.org> wrote:
> > > >
> > > > I get it. Firstly, it's an NCO:
> > > > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > > > From that, the thing gives a fixed-width pulse (a little shorter than
> > > > one cycle at the max frequency) for every cycle of output, thus the
> > > > average voltage (the output of a low-pass filter) is proportional to
> > > > frequency.
> > > >
> > > > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >
> > > > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > > > >
> > > > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > > > >
> > > > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > > > >
> > > > >
> > > > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > > > >
> > > > > > I don't get it. Most of the algorithm is missing.
> > > > > >
> > > > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > > > >>
> > > > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > > > >>
> > > > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > > > >>
> > > > > >>
> > > > > >> That's not what I meant when I said PDM, certainly.
> > > > > >>
> > > > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > > > >>
> > > > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > > > >>
> > > > > >> HTH,
> > > > > >> Tom
> > > > > >>
> > > > > >>
> > > > > >> I've read this a few times but I'm struggling to understand what's
> > > > > >> going on. Can someone type out an algorithm or something like that?
> > > > > >> Would appreciate it a lot. Thanks.
> > > > > >>
> > > > > >>
> > > > > >> Ok, it'd look something like this:
> > > > > >>
> > > > > >> phase: 16-bit variable (for example)
> > > > > >> freq: 16-bit variable (same as phase)
> > > > > >>
> > > > > >> So we do:
> > > > > >>
> > > > > >> // Increment phase accumulator
> > > > > >> phase = phase + freq
> > > > > >>
> > > > > >> // Did phase wraparound?
> > > > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > > > >> // Ok, phase wrapped
> > > > > >> phase = phase % 65536
> > > > > >> // output a pulse a single clock in length
> > > > > >> <this is implementation dependent!>
> > > > > >> }
> > > > > >>
> > > > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > > > >>
> > > > > >>
> > > > > >> There's a page about NCOs in general on my website:
> > > > > >>
> > > > > >> https://electricdruid.net/direct-digital-synthesis/
> > > > > >>
> > > > > >> HTH,
> > > > > >> Tom
> > > > > >>
> > > > > >>
> > > > >
> > > > >
> > > > > _______________________________________________
> > > > > Synth-diy mailing list
> > > > > Synth-diy at synth-diy.org
> > > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > > Selling or trading? Use marketplace at synth-diy.org
> > > >
> > > > _______________________________________________
> > > > Synth-diy mailing list
> > > > Synth-diy at synth-diy.org
> > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > Selling or trading? Use marketplace at synth-diy.org
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org

________________________________
From: cheater cheater <cheater00social at gmail.com>
Sent: 09 December 2023 01:46
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

hmm... the need for external, high quality op amps and board real
estate does raise the cost per channel significantly, doesn't it...

On Sat, Dec 9, 2023 at 2:35?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> Drift is down to the crystal osc used - 25ppm ?
>
> Lots of better opamps nowadays.  I think I used the Harris 2605 in those days which was as good as it got back then, but loads far better ones around now.  As indeed are there better capacitors.
>
>
> ________________________________
> From: cheater cheater <cheater00social at gmail.com>
> Sent: 09 December 2023 01:25
> To: Mike Bryant <mbryant at futurehorizons.com>
> Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> That's really good performance. What do you think of its medium (~1
> Hz) and long term (~0.01Hz and less) drift performance?
>
> What do you think makes a good integrator in such a case?
>
> On Sat, Dec 9, 2023 at 2:06?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> >
> > No, jitter is to reduce EMC.  If you're producing a varying voltage it's spread all over the spectrum, but for a constant voltage all the energy is at one frequency which isn't good.  Jitter smears it out a bit.
> >
> > The method shown with a good integrator gave 18 bits at 16kHz 40 years ago, so no need to make it any better for synth CVs - just use a better op-amp and capacitor to avoid a correction table.
> >
> >
> > ________________________________
> > From: cheater cheater <cheater00social at gmail.com>
> > Sent: 08 December 2023 23:18
> > To: Mike Bryant <mbryant at futurehorizons.com>
> > Cc: Ben Bradley <ben.pi.bradley at gmail.com>; SDIY <synth-diy at synth-diy.org>
> > Subject: Re: [sdiy] Generating a large number of CV outputs
> >
> > Right, that makes sense. Thanks a lot guys!
> >
> > So what was that about using jitter? Is that to make the integrator
> > "more perfect"?
> >
> > If instead of using single pulses you used BLEPs or something similar,
> > could that help as well? Or some sort of linear interpolation that
> > outputs two samples in succession (so that their sum is 65535) in some
> > smart way ...
> >
> >
> > On Sat, Dec 9, 2023 at 12:09?AM Mike Bryant <mbryant at futurehorizons.com> wrote:
> > >
> > > Only with a perfect integrator, which to get to 18 bit accuracy is extremely hard.  In practice you measure a few prototypes and build a correction table to give the voltages you require.
> > >
> > >
> > > ________________________________
> > > From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of cheater cheater via Synth-diy <synth-diy at synth-diy.org>
> > > Sent: 08 December 2023 22:49
> > > To: Ben Bradley <ben.pi.bradley at gmail.com>
> > > Cc: SDIY <synth-diy at synth-diy.org>
> > > Subject: Re: [sdiy] Generating a large number of CV outputs
> > >
> > > Does that mean the final output voltage (after the reconstruction
> > > filter) is proportional to the freq value in the algorithm Tom posted
> > > above? So you set the desired output value by setting the freq
> > > variable?
> > >
> > > On Fri, Dec 8, 2023 at 11:47?PM Ben Bradley via Synth-diy
> > > <synth-diy at synth-diy.org> wrote:
> > > >
> > > > I get it. Firstly, it's an NCO:
> > > > https://en.wikipedia.org/wiki/Numerically_controlled_oscillator
> > > > From that, the thing gives a fixed-width pulse (a little shorter than
> > > > one cycle at the max frequency) for every cycle of output, thus the
> > > > average voltage (the output of a low-pass filter) is proportional to
> > > > frequency.
> > > >
> > > > On Fri, 8 Dec 2023 at 16:43, Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > >
> > > > > Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> > > > >
> > > > > Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> > > > >
> > > > > If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> > > > >
> > > > >
> > > > > > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> > > > > >
> > > > > > I don't get it. Most of the algorithm is missing.
> > > > > >
> > > > > > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> > > > > >>
> > > > > >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >>
> > > > > >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> > > > > >>
> > > > > >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> > > > > >> describes), then it does indeed lock you into a lower sampling rate, and
> > > > > >> that's one reason I skipped describing *that* technique.  But PWM with
> > > > > >> bit-reversal seems not to be what you mean when you say PDM.
> > > > > >>
> > > > > >>
> > > > > >> That's not what I meant when I said PDM, certainly.
> > > > > >>
> > > > > >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> > > > > >>
> > > > > >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> > > > > >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> > > > > >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> > > > > >>
> > > > > >> HTH,
> > > > > >> Tom
> > > > > >>
> > > > > >>
> > > > > >> I've read this a few times but I'm struggling to understand what's
> > > > > >> going on. Can someone type out an algorithm or something like that?
> > > > > >> Would appreciate it a lot. Thanks.
> > > > > >>
> > > > > >>
> > > > > >> Ok, it'd look something like this:
> > > > > >>
> > > > > >> phase: 16-bit variable (for example)
> > > > > >> freq: 16-bit variable (same as phase)
> > > > > >>
> > > > > >> So we do:
> > > > > >>
> > > > > >> // Increment phase accumulator
> > > > > >> phase = phase + freq
> > > > > >>
> > > > > >> // Did phase wraparound?
> > > > > >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> > > > > >> // Ok, phase wrapped
> > > > > >> phase = phase % 65536
> > > > > >> // output a pulse a single clock in length
> > > > > >> <this is implementation dependent!>
> > > > > >> }
> > > > > >>
> > > > > >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> > > > > >>
> > > > > >>
> > > > > >> There's a page about NCOs in general on my website:
> > > > > >>
> > > > > >> https://electricdruid.net/direct-digital-synthesis/
> > > > > >>
> > > > > >> HTH,
> > > > > >> Tom
> > > > > >>
> > > > > >>
> > > > >
> > > > >
> > > > > _______________________________________________
> > > > > Synth-diy mailing list
> > > > > Synth-diy at synth-diy.org
> > > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > > Selling or trading? Use marketplace at synth-diy.org
> > > >
> > > > _______________________________________________
> > > > Synth-diy mailing list
> > > > Synth-diy at synth-diy.org
> > > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > > Selling or trading? Use marketplace at synth-diy.org
> > >
> > > _______________________________________________
> > > Synth-diy mailing list
> > > Synth-diy at synth-diy.org
> > > http://synth-diy.org/mailman/listinfo/synth-diy
> > > Selling or trading? Use marketplace at synth-diy.org
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From lijon at kymatica.com  Sat Dec  9 11:03:36 2023
From: lijon at kymatica.com (Jonatan Liljedahl)
Date: Sat, 9 Dec 2023 11:03:36 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB713230FA4C3B5289536363F0DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CWLP265MB713230FA4C3B5289536363F0DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CALfiFhAHeb7GnNN4bN3=57fC+hdjcSo+e-5Gh3i-5ZTGw+1D8Q@mail.gmail.com>

One way to reduce the noise coming from the MUX control signals is to use
grey code instead of binary count, so that only one adress line changes at
a time.

On Fri, 8 Dec 2023 at 15:29, Mike Bryant <mbryant at futurehorizons.com> wrote:

>
>    - OTOH I would love to see someone doing 100-outs MUX with single DAC spitting
>    16-bit precision at 1Msps   Roman
>
>
> I think the uneven capacitance alone to each of the S/Hs would make this
> impossible.   And the noise from all the control signals to the gates are
> almost bound to cross critical tracks.
>
> ------------------------------
> *From:* Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Roman
> Sowa <modular at go2.pl>
> *Sent:* 08 December 2023 14:07
> *To:* Danjel van Tijn / intellijel <danjel at intellijel.com>; SDIY <
> synth-diy at synth-diy.org>
> *Subject:* Re: [sdiy] Generating a large number of CV outputs
>
> I'm triggered, because that's something I was recently evaluating (but
> don't feel like doing for various reasons).
> The DACs can be as cheap as they wish, but will never be S&H-MUX cheap.
> Surely there are cheap excellent 12-bit DACs now with price per channel
> below $1 but that's still a lot of money. You could also consider
> 96-channel DAC and just don't bother designing huge circuitry around it,
> but not only it cost $80 in singles but also is huge BGA monster.
>
> I reckon you're not doing it for space or military, so IMHO the mux way
> is the only way still.
>
> With 100 outs at "few" kHz update rate you're struggling with 1us analog
> MUX settling time, and when you say 16-bit, that makes me shiver.
> What you can do is split it to couple of separate muxes with their own
> DACs, and feed them sequentially. Huge analog circuitry with lots of
> muxes, opamps, caps and countless meters of traces will be happier
> getting an update every 10us rather than 1us. Interlace DAC update
> moments with MUX address changes to make sure new output is well settled
> before MUX opens.
> Also, with multiple DACs and MUXes you can spread the circuitry on the
> board so DAC's opamp will not have to drive too much, but only a couple
> of MUXes gathered around it.
>
> OTOH I would love to see someone doing 100-outs MUX with single DAC
> spitting 16-bit precision at 1Msps
>
> Roman
>
>
> W dniu 2023-12-08 o 01:35, Danjel van Tijn / intellijel pisze:
> > What is the current ideal way to generate a large number of CV outputs
> > from a single CPU?
> >
> > Let's say I wanted to generate 100 outputs with an update rate of a few
> > kHz and an equivalent bit depth of 12 or 16 bits.
> >
> > I know that back in the day when DACs were extremely expensive, the
> > designs would use a single DAC and then demux to a bunch of S&Hs.
> >
> > Now that DACs are cheaper, is it better to chain a bunch of 8- or
> > 16-channel DACs?
> >
> > Or would it make more sense to use an FPGA and create a giant
> > multi-channel 1-Bit DAC?
> >
> > Looking at some Elektron hardware teardowns it appears that they are
> > using the latter approach.
> >
> > _______________________________________________
> > Synth-diy mailing list
> > Synth-diy at synth-diy.org
> > http://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
-- 
/Jonatan
http://kymatica.com
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From neil.johnson71 at gmail.com  Sat Dec  9 11:31:35 2023
From: neil.johnson71 at gmail.com (Neil Johnson)
Date: Sat, 9 Dec 2023 10:31:35 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CALfiFhAHeb7GnNN4bN3=57fC+hdjcSo+e-5Gh3i-5ZTGw+1D8Q@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CWLP265MB713230FA4C3B5289536363F0DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CALfiFhAHeb7GnNN4bN3=57fC+hdjcSo+e-5Gh3i-5ZTGw+1D8Q@mail.gmail.com>
Message-ID: <CACZGMxLeetJd4kpVhuXbgbD_PcPMJssBwDseFnRC103Xg4KBrA@mail.gmail.com>

Hi,

Jonatan Liljedahl wrote:
> One way to reduce the noise coming from the MUX control signals is to use grey code instead of binary count, so that only one adress line changes at a time.

Yes that can reduce the amplitude of the spike at the clock frequency,
but I suspect what Mike is referring to is what is termed "spread
spectrum" which spreads the RF energy across a band rather than all in
one place.  We do that on large SoC memory buses and you can see on a
spectrum analyser when it is turned on (looks like "__.........__")
and off (looks like "_____/\_____").  It's usually a setting in the
memory bus controller.

Anyway, PDM ... yeah, a lot of tiny MEMS mics use it now.  And you can
do stereo on a single data line too (L on rising edge, R on falling
edge).

And CVs: having a "mother of all CV sources" can work if you're
careful.  When you're dealing with that many CVs then the
cost-per-channel becomes significant due to the multiplying effect: in
a 100-channel design adding 1c per channel adds $1 to the BOM.  A
decent DAC, 4051s, C0G caps and decent JFET opamps is very cheap in
quantity.

Neil


From ben at stuyts.nl  Sat Dec  9 17:44:18 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Sat, 9 Dec 2023 17:44:18 +0100
Subject: [sdiy] [ADMIN] Forwarding of messages
Message-ID: <07AA0857-042C-41BB-A9A0-668D3E9A560E@stuyts.nl>

Hi all,

TLDR: Don?t forward you list emails to another domain.

As you probably know, every now and then we see complaints of a few list members not receiving all messages. They are visible in the mailing list archive, and also received by most other people.

Thanks to Mattias and Mike, I think I might have found at least one probably cause for this: Forwarding from one domain to another. For example:

- list member is subscribed as person at example.org <mailto:person at example.org>.
- email from list is sent to example.org <http://example.org/> mail server.
- example.org <http://example.org/> forwards this mail automatically to person at gmail.com <mailto:person at gmail.com>.
- google receives this email from example.org <http://example.org/> but sender is still: synth-diy at synth-diy.org <mailto:synth-diy at synth-diy.org>.
- google checks SPF record (an anti-spoof measure) for synth-diy and sees that only the mail server for synth-diy.org <http://synth-diy.org/> is allowed to do this.
- google refuses the mail and bounces it back, mail is ?lost? to person at gmail.org <mailto:person at gmail.org>.

This problem was elusive to me in the past because bounce message were not saved at my end. They now are, and I got a better picture of this.

Note that this problem is not limited to this (or any other) mailing list. It can (and did) also happen with private emails. In Mattias? case, this was what got me on track.

So, hope this helps.

Ben




From brianw at audiobanshee.com  Sun Dec 10 00:51:34 2023
From: brianw at audiobanshee.com (brianw)
Date: Sat, 9 Dec 2023 15:51:34 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
Message-ID: <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>

A big consideration is the many aspects of how the CPU interfaces with the DAC, as well as how the DAC handles the data conversion.

One variable is fixed versus variable sample rate. With a fixed sample rate, your CPU has to generate data transfers continuously, even though the value may not actually be changing. This can be a benefit if your S/H circuit needs refreshing to keep the capacitors from drooping in voltage over long periods, but there are other ways to solve that. With a DAC that can handle variable sample rates, e.g., a DAC that will only update the output voltage when you tell it to, the CPU does not have to generate data unless there is a change. If your primary focus is responding to MIDI Continuous Control change messages, then it's much easier to design with a DAC will will accept a new value as soon as a message comes in, rather than a DAC that needs a continuous data stream (usually fed from a waveform buffer). DAC chips that operate on a fixed sample rate require a clock signal as part of the serial bus that they use, whereas DAC chips that are flexible about fixed or variable sample rate do not need a clock, per se, because they have a "convert" signal to load each new value. There is clearly some overlap in the design here, but the point is that you want to think about what the CPU is required to do to feed the DAC. In general, a DAC that is capable of variable sample rates will hold a DC value between changes, whereas (in general) many audio DAC chips require a fixed sample rate with large words and do not guarantee DC.

Another variable is the interface: parallel versus serial. This can be important because some modern CPU chips are very limited in number of GPIO pins. This can be solved with an external serial-to-parallel chip, but that's an extra part. Related to sample rate above, parallel interfaces can generally be updated at any rate, whereas serial interfaces often require a fixed sample rate. That said, there are certainly serial interface converter chips that will operate with variable sample rates, but their serial interface protocol needs at least an extra bit to start and stop each asynchronous transfer. The fixed sample rate serial interfaces generally have a clock, word select, and data lines.

A huge issue is whether the DAC employs oversampling, and thus whether it can handle multiplexing unrelated signals through a MUX. In general, a parallel interface DAC does not employ oversampling, and thus you can feed lots of unrelated signals through the DAC without concern about "crosstalk" due to the oversampling filters blending subsequent sample values together. All 24-bit audio CODEC chips use oversampling filters such that the output at any time is influenced by the last several values. This makes an audio CODEC chip inappropriate for use with a S/H MUX. I've heard people argue that you can determine the impulse response of your CODEC, and feed in extra 'zero-value' samples to clear the filter state between each conversion, and supposedly this will allow unrelated signals to be passed through the CODEC without each signal interfering with the other. But that's an example of way too many bits in each word and way too many data transfers per conversion to be an efficient model. Your CPU will run out of power an order of magnitude faster with this approach.


To use specific examples:

If you pick an 8-channel audio CODEC that's capable of 44.1 kHz to 192 kHz, then your CPU will need DMA buffers in memory with 24-bit waveform data for all 8 channels, and a serial digital audio interface with clock, data, word and channel control signals running constantly. Changing the output value for one channel requires knowing what point in the DMA cycle a given channel is so that you can update the waveform memory without unexpected glitches. You're also stuck with that same fixed sample rate for all 8 channels. The CODEC option does not allow for a (reasonable) MUX expansion beyond the supported 8 channels. More channels means more serial interfaces, and the CPU will have a limited number of serial digital audio interfaces.

If you pick a 1-channel precision DAC that's capable of 125 MHz at 14-bit or 16-bit, combined with a control signal to trigger the conversion, then your CPU will only need to transfer data as needed. You also have the option of fixed sample rate here, but it's not required. Individual S/H outputs can be updated at any rate you desire, so long as the overhead of the MUX address and S/H timing is handled (preferably by hardware logic) quickly enough to support the desired sample rate. This sort of design even allows different sample rates for different outputs, although you can't guarantee simultaneous update of multiple outputs without a second stage of S/H. You can run as many channels as you like, provided you have a large enough MUX with S/H stages.


I've designed a 32-channel system using a 14-bit current output DAC that is capable of 125 MHz. It's fed by a DMA triggered at 4 MHz, spanning all 32 channels, so each channel has an update rate of 125 kHz. In this case, I was generating waveforms, so it made sense to use DMA and prepare the waveform data in memory.

I've also designed a 16-channel system using a 16-bit voltage output DAC with a rate that's not quite as high as the current output DAC. This system is for CV, and I haven't decided whether to use a fixed sample rate or a variable sample rate, but the key is that the hardware and interface do not force the choice.


Personally, given the long history of DAC and CODEC designs, I strongly recommend against designing your own converter. These filtered pulse solutions have much longer settling times than the 8-nanosecond setting time of that 125 MHz current output DAC (from Texas Instruments).

Brian Willoughby

p.s. One or more folks have suggested spreading out the MUX S/H channels across different areas of the PCB. There's a hidden advantage here because if you try to put all of the S/H MUX channels in a central location, then you have the challenging of maintaining an accurate analog voltage (ground) reference over a large area. If, instead, you spread the channels across multiple smaller areas (even separate PCBs!) and use digital connections between board areas, then a smaller number of channels can be handled by a DAC that shares an analog ground reference with the CV signals in that area. You're more likely to achieve 16-bit accuracy if you design the analog references more carefully, especially keeping them local.


On Dec 7, 2023, at 4:35 PM, Danjel van Tijn / intellijel <danjel at intellijel.com> wrote:
> What is the current ideal way to generate a large number of CV outputs from a single CPU?
> 
> Let's say I wanted to generate 100 outputs with an update rate of a few kHz and an equivalent bit depth of 12 or 16 bits.
> 
> I know that back in the day when DACs were extremely expensive, the designs would use a single DAC and then demux to a bunch of S&Hs.  
> 
> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel DACs? 
> 
> Or would it make more sense to use an FPGA and create a giant multi-channel 1-Bit DAC?
> 
> Looking at some Elektron hardware teardowns it appears that they are using the latter approach.





From brianw at audiobanshee.com  Sun Dec 10 01:27:51 2023
From: brianw at audiobanshee.com (brianw)
Date: Sat, 9 Dec 2023 16:27:51 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <5e08b83b-b25a-47b1-a160-c85977956727@comcast.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <5e08b83b-b25a-47b1-a160-c85977956727@comcast.net>
Message-ID: <0B8757E7-EA84-4C7D-8ABF-4862E0D6B359@audiobanshee.com>

In my experience, multiple processors are not needed. I tend to select processors that support 20 MHz or 25 MHz on their SPI interfaces, and which have lots of DMA channels and hardware support so that no "bit-banging" is required at all. On one hand, I don't select Arm A-series processors that run in the GHz clock rates, so it's not that a lot of CPU is needed. Instead, M-series processors are sufficient so long as you plan for sufficient hardware peripheral support for the tasks needed. You don't need lots of processors or high CPU clock rates if you handle the heavy lifting in hardware.

I've found that PCB layout for 20 MHz SPI is easy. I was prepared to do lots of tuning to get the signal edges right, but the untuned circuit worked just fine. You definitely want to have the standard RC tuning designed into the PCB, just in case.

I agree that you'll want to calculate how long it takes to actually do a transfer. This can get quite detailed due to DAC settling times, MUX address setup and switching time, ... but also the details of the serial transfer are important.

e.g. I had one design with 16 channels of ADC across two 8-channel ADC chips. The maximum sample rate was 1 MHz, and that meant 125 kHz per channel and two SPI ports. This was 12-bit ADC, with a 16-bit control word. I almost forgot to account for the gap between samples on the SPI interface that accounts for 1 bit cell, so the minimum SPI rate for my data was 18 MHz, and the maximum rate for that DSP chip's SPI ports was 20 MHz, so the design just barely fit. I had calculated 16 MHz SPI clock but didn't realize there was a gap between words due to the SPI mode, and I was lucky that the hardware would bump up to 18 MHz without exceeding the limits. Moral: Look at all the details, and allow for prototyping to find anything you've missed!

Brian W.


On Dec 7, 2023, at 5:02 PM, Jay Schwichtenberg via Synth-diy <synth-diy at synth-diy.org> wrote:
> You are probably going to have to have a master to set everything up and multiple processors to output stuff in parallel.
> 
> Figure out which interface you are going to use. Probably SPI or I2C, even though a lot of SPI interfaces run at 50 MHz it's going to take PCB rocket science to get it to work that fast.
> 
> Then pick your chips you're going to use.
> 
> Last thing is do a calculation to figure out how long it actually takes to do a transfer.
> 
> Jay S.
> 
> On 12/7/2023 4:35 PM, Danjel van Tijn / intellijel wrote:
>> What is the current ideal way to generate a large number of CV outputs from a single CPU?
>> 
>> Let's say I wanted to generate 100 outputs with an update rate of a few kHz and an equivalent bit depth of 12 or 16 bits.
>> 
>> I know that back in the day when DACs were extremely expensive, the designs would use a single DAC and then demux to a bunch of S&Hs.  
>> 
>> Now that DACs are cheaper, is it better to chain a bunch of 8- or 16-channel DACs? 
>> 
>> Or would it make more sense to use an FPGA and create a giant multi-channel 1-Bit DAC?
>> 
>> Looking at some Elektron hardware teardowns it appears that they are using the latter approach.




From brianw at audiobanshee.com  Sun Dec 10 03:08:20 2023
From: brianw at audiobanshee.com (brianw)
Date: Sat, 9 Dec 2023 18:08:20 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
Message-ID: <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>



On Dec 8, 2023, at 6:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> Roman Sowa <modular at go2.pl> skrev:
>> OTOH I would love to see someone doing 100-outs MUX with single DAC 
>> spitting 16-bit precision at 1Msps
> 
> That's basically what we do since 2012.  
> 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV channels, each at 24kHz update rate (no zipper noise in the audio band). 
> Works well, but I wouldn't want to try controlling that DAC/mux timing with a microprocessor, or build it on a single-sided board. :-)
> 
> /mr

One question I have is, "How much reconstruction filtering is necessary?"

Granted, my question is about a large number of signal outputs, NOT a large number of CV outputs.

One DAC with many MUX S/H outputs cannot be filtered at the DAC output, because you don't want to mix the channel signals together with the filter. Instead, each individual MUX S/H output needs its own reconstruction filter. I went with a single-pole low-pass, but that requires significant oversampling compared to the desired signal frequency bandwidth. Higher-order reconstruction filtering helps lower the oversampling requirements, but adds to the cost of the analog circuitry, not to mention the PCB real estate.

What do folks tend to choose in this scenario?

Brian Willoughby




From mr at analogue.org  Sun Dec 10 12:50:02 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 12:50:02 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
Message-ID: <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>

brianw <brianw at audiobanshee.com> skrev:

> On Dec 8, 2023, at 6:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> > Roman Sowa <modular at go2.pl> skrev:
> >> OTOH I would love to see someone doing 100-outs MUX with single DAC
> >> spitting 16-bit precision at 1Msps
> >
> > That's basically what we do since 2012.
> > 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV
> channels, each at 24kHz update rate (no zipper noise in the audio band).
> > Works well, but I wouldn't want to try controlling that DAC/mux timing
> with a microprocessor, or build it on a single-sided board. :-)
>
> One question I have is, "How much reconstruction filtering is necessary?"
>

It was enough with an extra RC link directly after the mux cap, before the
buffer op-amp. Added cost: ~0.008 $ per CV channel.

/mr
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From mbryant at futurehorizons.com  Sun Dec 10 12:55:27 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sun, 10 Dec 2023 11:55:27 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
Message-ID: <CWLP265MB7132EDEFB60BE4BB2EA094FCDB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

You're being robbed.  Should be $0.0015 !!  :-)

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Mattias Rickardsson <mr at analogue.org>

One question I have is, "How much reconstruction filtering is necessary?"

It was enough with an extra RC link directly after the mux cap, before the buffer op-amp. Added cost: ~0.008 $ per CV channel.

/mr

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From mr at analogue.org  Sun Dec 10 13:03:30 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 13:03:30 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
Message-ID: <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>

Den s?n 10 dec. 2023 00:52brianw <brianw at audiobanshee.com> skrev:
>
> Personally, given the long history of DAC and CODEC designs, I strongly
recommend against designing your own converter. These filtered pulse
solutions have much longer settling times than the 8-nanosecond setting
time of that 125 MHz current output DAC (from Texas Instruments).

Here you only mean for mux-ing applications I presume? That's where it's
important with fast settling.

If you'd build a multi-channel DAC using an FPGA, the settling behavior of
your homebrew solution wouldn't be as much of a problem.

/mr

PS: on the topic of strangenesses in emails, what's the cause of the
inserted  [exclamation point + newline + whitespace]  in long paragraphs?
See:


... as a message comes in, rather than a DAC that needs a continuous data
> stream (usually fed from a waveform buffer). DAC chips that operate on a
> fixed sample rate require a clock signal as part of the serial bus that
> they use, whereas DAC chips that are flexible about fixed or variable
> sample!
>   rate do not need a clock, per se, because they have a "convert" signal
> to load each new value. There is clearly some overlap in the design here,
> but the point is that you want to think about what the CPU is required to
> do to feed the DAC. In general, a DAC that is capable of variable...


... CODEC without each signal interfering with the other. But that's an
> example of way too many bits in each word and way too many data transfers
> per conversion to be an effici!
>  ent model. Your CPU will run out of power an order of magnitude faster
> with this approach.
>
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From ben at stuyts.nl  Sun Dec 10 19:30:56 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Sun, 10 Dec 2023 19:30:56 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
Message-ID: <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>

Hi Mattias,

Is this is the message you are quoting? https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html If so, I do not see it in my copy of the message, nor in the Archive. So it could be something in your mail client? Or forwarder? ;-)

Ben

> On 10 Dec 2023, at 13:03, Mattias Rickardsson <mr at analogue.org> wrote:
> 
> [snip]
> PS: on the topic of strangenesses in emails, what's the cause of the inserted  [exclamation point + newline + whitespace]  in long paragraphs? See:
> 
> 
>> ... as a message comes in, rather than a DAC that needs a continuous data stream (usually fed from a waveform buffer). DAC chips that operate on a fixed sample rate require a clock signal as part of the serial bus that they use, whereas DAC chips that are flexible about fixed or variable sample!
>>   rate do not need a clock, per se, because they have a "convert" signal to load each new value. There is clearly some overlap in the design here, but the point is that you want to think about what the CPU is required to do to feed the DAC. In general, a DAC that is capable of variable...
> 
> 
>> ... CODEC without each signal interfering with the other. But that's an example of way too many bits in each word and way too many data transfers per conversion to be an effici!
>>  ent model. Your CPU will run out of power an order of magnitude faster with this approach.

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From mr at analogue.org  Sun Dec 10 20:25:55 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 20:25:55 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132EDEFB60BE4BB2EA094FCDB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
 <CWLP265MB7132EDEFB60BE4BB2EA094FCDB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAP92RBWr2kprdvXyGSxeFBjeEyxskqeAXZime0R12A2Q1bnUrg@mail.gmail.com>

Den s?n 10 dec. 2023 12:55Mike Bryant <mbryant at futurehorizons.com> skrev:

> You're being robbed.  Should be $0.0015 !!  :-)
>

Haha! I was including the PCB mounting cost. :-D

/mr


*From:* Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Mattias
> Rickardsson <mr at analogue.org>
>
> One question I have is, "How much reconstruction filtering is necessary?"
>
> It was enough with an extra RC link directly after the mux cap, before the
> buffer op-amp. Added cost: ~0.008 $ per CV channel.
>
> /mr
>
>
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From mr at analogue.org  Sun Dec 10 20:28:19 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 20:28:19 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
Message-ID: <CAP92RBXZN6BCP+vG4+5dsXk2iwR_adOjKyJJVGcNoKTspQgPZg@mail.gmail.com>

Den s?n 10 dec. 2023 19:31Ben Stuyts <ben at stuyts.nl> skrev:

> Hi Mattias,
>
> Is this is the message you are quoting?
> https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html If
> so, I do not see it in my copy of the message, nor in the Archive. So it
> could be something in your mail client? Or forwarder? ;-)
>

Touch?!!!  :'-D

/mr - not referring to the Buchla



> On 10 Dec 2023, at 13:03, Mattias Rickardsson <mr at analogue.org> wrote:
>
> [snip]
> PS: on the topic of strangenesses in emails, what's the cause of the
> inserted  [exclamation point + newline + whitespace]  in long paragraphs?
> See:
>
>
> ... as a message comes in, rather than a DAC that needs a continuous data
>> stream (usually fed from a waveform buffer). DAC chips that operate on a
>> fixed sample rate require a clock signal as part of the serial bus that
>> they use, whereas DAC chips that are flexible about fixed or variable
>> sample!
>>   rate do not need a clock, per se, because they have a "convert" signal
>> to load each new value. There is clearly some overlap in the design here,
>> but the point is that you want to think about what the CPU is required to
>> do to feed the DAC. In general, a DAC that is capable of variable...
>
>
> ... CODEC without each signal interfering with the other. But that's an
>> example of way too many bits in each word and way too many data transfers
>> per conversion to be an effici!
>>  ent model. Your CPU will run out of power an order of magnitude faster
>> with this approach.
>>
>
>
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From brianw at audiobanshee.com  Sun Dec 10 20:30:05 2023
From: brianw at audiobanshee.com (brianw)
Date: Sun, 10 Dec 2023 11:30:05 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
Message-ID: <C14B7604-0B9C-4C32-BE5B-6250E97B967F@audiobanshee.com>

This is very strange. The copy of my message that I received from the mailing list has that corruption, but following the link to the Archive shows the message as I sent it. I just confirmed by looking at the raw content of the message that I received from the list, and the !\n corruption is there in the plain ASCII content (i.e. this is not an HTML formatted message).

Somehow, the message is getting corrupted on its way to some list members and not others.

Brian

On Dec 10, 2023, at 10:30 AM, Ben Stuyts <ben at stuyts.nl> wrote:
> Hi Mattias,
> 
> Is this is the message you are quoting? https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html If so, I do not see it in my copy of the message, nor in the Archive. So it could be something in your mail client? Or forwarder? ;-)
> 
> Ben
> 
> On 10 Dec 2023, at 13:03, Mattias Rickardsson <mr at analogue.org> wrote:
>> [snip]
>> PS: on the topic of strangenesses in emails, what's the cause of the inserted  [exclamation point + newline + whitespace]  in long paragraphs? See:
>> 
>> 
>> ... as a message comes in, rather than a DAC that needs a continuous data stream (usually fed from a waveform buffer). DAC chips that operate on a fixed sample rate require a clock signal as part of the serial bus that they use, whereas DAC chips that are flexible about fixed or variable sample!
>>   rate do not need a clock, per se, because they have a "convert" signal to load each new value. There is clearly some overlap in the design here, but the point is that you want to think about what the CPU is required to do to feed the DAC. In general, a DAC that is capable of variable...
>> 
>> ... CODEC without each signal interfering with the other. But that's an example of way too many bits in each word and way too many data transfers per conversion to be an effici!
>>  ent model. Your CPU will run out of power an order of magnitude faster with this approach.




From brianw at audiobanshee.com  Sun Dec 10 20:36:09 2023
From: brianw at audiobanshee.com (brianw)
Date: Sun, 10 Dec 2023 11:36:09 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
Message-ID: <F8B66559-1BCD-42D6-919B-B4DC247BDC1A@audiobanshee.com>

A passive RC link between the mux cap (a.k.a. S/H cap) before the buffer op-amp will drain the S/H storage cap. I'm super-paranoid about selecting op-amps with JFET inputs and tens of gigaohms of input impedance to avoid draining that S/H cap. Putting a passive RC filter between the cap and op-amp buffer would defeat that.

Wouldn't the same RC filter work equally well *after* the buffer op-amp?

p.s. After the op-amp is where I placed my single-pole low-pass. So I guess you've answered my question in respect to whether some folks consider single-pole to be enough.

Brian


On Dec 10, 2023, at 3:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> brianw <brianw at audiobanshee.com> skrev:
> On Dec 8, 2023, at 6:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> > Roman Sowa <modular at go2.pl> skrev:
> >> OTOH I would love to see someone doing 100-outs MUX with single DAC 
> >> spitting 16-bit precision at 1Msps
> > 
> > That's basically what we do since 2012.  
> > 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV channels, each at 24kHz update rate (no zipper noise in the audio band). 
> > Works well, but I wouldn't want to try controlling that DAC/mux timing with a microprocessor, or build it on a single-sided board. :-)
> 
> One question I have is, "How much reconstruction filtering is necessary?"
> 
> It was enough with an extra RC link directly after the mux cap, before the buffer op-amp. Added cost: ~0.008 $ per CV channel.
> 
> /mr
> 




From dkantowitz at gmail.com  Sun Dec 10 20:36:32 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Sun, 10 Dec 2023 11:36:32 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
Message-ID: <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>

The carry-bit NCO technique is also equivalent to a 1-bit first order sigma
delta DAC.  Probably doesn't make it much easier to understand, but it does
make the design conclusions from sigma delta usable.  Ex. noise shaping
curves, required Over Sampling Rates vs ENOB, reconstruction filtering
(see: https://en.wikipedia.org/wiki/Delta-sigma_modulation).

To help myself visualize this, I plotted the output bit patterns for each
input level.  Both modulation algorithms (1-bit carry NCO and SD-1)
produced the same chart.

DC level is y-axis, time is x-axis.
[image: image.png]
Repeated 4 times to help imagine the oversampling:
[image: image.png]

For comparison basic PWM looks like:
[image: image.png]

By looking across a horizontal line, you can easily see the carry-bit
approach has a vast reduction in low frequency content compared to PWM.
That is, the digital signal 'noise' is being pushed into higher
frequencies.  However, there's still plenty of repeating pattern in the
NCO/SD-1


On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net> wrote:

> Honestly, it's not. It's just that damn simple. The version I actually
> wrote was all hardware module set-up specific to the device, and basically
> nothing else, so wouldn't tell you anything. Turning it all into software
> loses a lot of the benefit, so doesn't make much sense, except to explain
> it.
>
> Play with some NCOs a bit, and then get them to make a single pulse when
> they wrap. And then - Bingo! You're there!
>
> If you thought something was missing, what exactly? Ask a more specific
> question and perhaps I can help fill in a blank. I well remember how weird
> this stuff seemed when I first met it, so I think I understand the position
> you're in now.
>
>
> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com>
> wrote:
> >
> > I don't get it. Most of the algorithm is missing.
> >
> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net>
> wrote:
> >>
> >>
> >>
> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com>
> wrote:
> >>
> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net>
> wrote:
> >>
> >>
> >>
> >>
> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
> synth-diy at synth-diy.org> wrote:
> >>
> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> >> describes), then it does indeed lock you into a lower sampling rate, and
> >> that's one reason I skipped describing *that* technique.  But PWM with
> >> bit-reversal seems not to be what you mean when you say PDM.
> >>
> >>
> >> That's not what I meant when I said PDM, certainly.
> >>
> >> The way I generated it is using an NCO. The NCO generates a single-shot
> output pulse everytime the phase accumulator wraps.
> >>
> >> Now consider what happens with a simple 8-bit NCO. If our frequency
> increment is 2, for example, we get a single output pulse every 128 clocks,
> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
> not next to each other like PWM. The output frequency would be (clock
> frequency / 128) in this situation.
> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses
> per 256 clocks, and again, they're nicely spaced out. The output frequency
> is now up to (clock /32) so there's been a big improvement, just by getting
> away from those extreme values a little bit.
> >> As the increment climbs, the accumulator wraps more and more often. At
> freq=128, every other clock is an output and we reach our maximum output
> frequency of (clock/2). As the increment goes above half, we start staying
> high for more than a single pulse, and the waveform effectively turns the
> other way up and we get a mirror image of the effect we've seen from 0-128.
> >>
> >> HTH,
> >> Tom
> >>
> >>
> >> I've read this a few times but I'm struggling to understand what's
> >> going on. Can someone type out an algorithm or something like that?
> >> Would appreciate it a lot. Thanks.
> >>
> >>
> >> Ok, it'd look something like this:
> >>
> >> phase: 16-bit variable (for example)
> >> freq: 16-bit variable (same as phase)
> >>
> >> So we do:
> >>
> >> // Increment phase accumulator
> >> phase = phase + freq
> >>
> >> // Did phase wraparound?
> >> If (phase>65535) { // There are probably better ways to do this test,
> if it's even required.
> >> // Ok, phase wrapped
> >> phase = phase % 65536
> >> // output a pulse a single clock in length
> >> <this is implementation dependent!>
> >> }
> >>
> >> All you need to do is run this code at a fast clock rate and you're
> off. Of course, the better way is if you can hand some of this overhead to
> hardware, and some modern uPs include NCOs as a peripheral and can be set
> up for this "single shot pulse output" mode, which means that the while
> thing boils down to simply updating the "freq" frequency increment variable
> with your current output. It's dead simple.
> >>
> >>
> >> There's a page about NCOs in general on my website:
> >>
> >> https://electricdruid.net/direct-digital-synthesis/
> >>
> >> HTH,
> >> Tom
> >>
> >>
>
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From mr at analogue.org  Sun Dec 10 20:41:30 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 20:41:30 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <F8B66559-1BCD-42D6-919B-B4DC247BDC1A@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
 <F8B66559-1BCD-42D6-919B-B4DC247BDC1A@audiobanshee.com>
Message-ID: <CAP92RBXE_qEKD=Jy3KWgbQ8Q_m5UaeGWnTBNFBJ3b1_qYLsbaA@mail.gmail.com>

On Sun, 10 Dec 2023 at 20:36, brianw <brianw at audiobanshee.com> wrote:

> A passive RC link between the mux cap (a.k.a. S/H cap) before the buffer
> op-amp will drain the S/H storage cap.


Yes, but it will only drain charge to the next cap, not to ground or other
potential.


> I'm super-paranoid about selecting op-amps with JFET inputs and tens of
> gigaohms of input impedance to avoid draining that S/H cap. Putting a
> passive RC filter between the cap and op-amp buffer would defeat that.
>

I'd say it works well. :-)


> Wouldn't the same RC filter work equally well *after* the buffer op-amp?
>

Sometimes, but not if it's supposed to feed low-impedance destinations.
IIRC I've added an RC link after the op-amp as well in some critical
situation.

/mr


On Dec 10, 2023, at 3:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> > brianw <brianw at audiobanshee.com> skrev:
> > On Dec 8, 2023, at 6:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> > > Roman Sowa <modular at go2.pl> skrev:
> > >> OTOH I would love to see someone doing 100-outs MUX with single DAC
> > >> spitting 16-bit precision at 1Msps
> > >
> > > That's basically what we do since 2012.
> > > 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV
> channels, each at 24kHz update rate (no zipper noise in the audio band).
> > > Works well, but I wouldn't want to try controlling that DAC/mux timing
> with a microprocessor, or build it on a single-sided board. :-)
> >
> > One question I have is, "How much reconstruction filtering is necessary?"
> >
> > It was enough with an extra RC link directly after the mux cap, before
> the buffer op-amp. Added cost: ~0.008 $ per CV channel.
> >
> > /mr
> >
>
>
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From brianw at audiobanshee.com  Sun Dec 10 20:44:11 2023
From: brianw at audiobanshee.com (brianw)
Date: Sun, 10 Dec 2023 11:44:11 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
Message-ID: <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>

Yes, I mean mux applications, but also any DAC output needs reconstruction filtering if you want to avoid aliasing. There are some delta-sigma DAC that are oversampled and attempt to perform most of the reconstruction filtering in the digital domain, but a DAC without this oversampling and filtering will need a reconstruction filter whether it's mux'd or not.

I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.

Comparing a multi-channel DAC implemented via FPGA implies that each output is dedicated and has its own pulse-smoothing filter. At that point, you already have significant filtering components.

Brian


On Dec 10, 2023, at 4:03 AM, Mattias Rickardsson <mr at analogue.org> wrote:
> Den s?n 10 dec. 2023 00:52brianw <brianw at audiobanshee.com> skrev:
> > 
> > Personally, given the long history of DAC and CODEC designs, I strongly recommend against designing your own converter. These filtered pulse solutions have much longer settling times than the 8-nanosecond setting time of that 125 MHz current output DAC (from Texas Instruments).
> 
> Here you only mean for mux-ing applications I presume? That's where it's important with fast settling. 
> 
> If you'd build a multi-channel DAC using an FPGA, the settling behavior of your homebrew solution wouldn't be as much of a problem. 




From mr at analogue.org  Sun Dec 10 21:00:12 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 21:00:12 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
Message-ID: <CAP92RBX2oYc4RVWxK8=aG6S65jpQion-KQ3nvZ7pxi9vVyH9Xg@mail.gmail.com>

On Sun, 10 Dec 2023 at 20:44, brianw <brianw at audiobanshee.com> wrote:

> Yes, I mean mux applications, but also any DAC output needs reconstruction
> filtering if you want to avoid aliasing.
>

You mean "imaging" - i.e., mirrors above the intended spectrum? Probably
not a huge problem with a high-frequency CV.


> I've recorded enough live electronic music performances to know that there
> is a surprisingly large number of commercial products out there with
> digital-to-analog conversion that has insufficient reconstruction
> filtering, as evidenced by the horrible aliasing. Granted, you have to
> record higher than 44.1 kHz to see this, since most DAC hardware is running
> at least that sample rate or higher.
>

Sorry, I was referring to multichannel CV DACs, since this thread is about
generating a large number of CV outputs. :-)

/mr
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From cheater00social at gmail.com  Sun Dec 10 21:34:51 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sun, 10 Dec 2023 21:34:51 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBX2oYc4RVWxK8=aG6S65jpQion-KQ3nvZ7pxi9vVyH9Xg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <CAP92RBX2oYc4RVWxK8=aG6S65jpQion-KQ3nvZ7pxi9vVyH9Xg@mail.gmail.com>
Message-ID: <CAGn5V---Dt6sp3q=r2pq7X5_xEx6RgzwcDZ4ffR8KcS8u+ANqw@mail.gmail.com>

> "imaging" - i.e., mirrors above the intended spectrum? Probably not a huge problem with a high-frequency CV.

disagree. a lot of synth modules end up being some form of ring
modulator when presented with HF control inputs. that of course ends
up in the audio range after the ring modulator mixes it with the audio
inputs.

On Sun, Dec 10, 2023 at 9:04?PM Mattias Rickardsson <mr at analogue.org> wrote:
>
> On Sun, 10 Dec 2023 at 20:44, brianw <brianw at audiobanshee.com> wrote:
>>
>> Yes, I mean mux applications, but also any DAC output needs reconstruction filtering if you want to avoid aliasing.
>
>
> You mean "imaging" - i.e., mirrors above the intended spectrum? Probably not a huge problem with a high-frequency CV.
>
>>
>> I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.
>
>
> Sorry, I was referring to multichannel CV DACs, since this thread is about generating a large number of CV outputs. :-)
>
> /mr
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From cheater00social at gmail.com  Sun Dec 10 21:38:56 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sun, 10 Dec 2023 21:38:56 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
Message-ID: <CAGn5V-_2amSBov=WU93A6kCeFO_ODg0m2Xw7s22xCY8HgpgtHg@mail.gmail.com>

On Sun, Dec 10, 2023 at 7:35?PM Ben Stuyts <ben at stuyts.nl> wrote:
>
> Hi Mattias,
>
> Is this is the message you are quoting? https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html If so, I do not see it in my copy of the message, nor in the Archive. So it could be something in your mail client? Or forwarder? ;-)
>
> Ben

I see them as well. I was wondering what's up. I'm subscribed directly
via gmail and read in the web client. There's no mail forwarding. It's
definitely how the mailing list sends them out, here's the "original
message" view: https://i.imgur.com/xkO9wi4.png

> On 10 Dec 2023, at 13:03, Mattias Rickardsson <mr at analogue.org> wrote:
>
> [snip]
> PS: on the topic of strangenesses in emails, what's the cause of the inserted  [exclamation point + newline + whitespace]  in long paragraphs? See:
>
>
>> ... as a message comes in, rather than a DAC that needs a continuous data stream (usually fed from a waveform buffer). DAC chips that operate on a fixed sample rate require a clock signal as part of the serial bus that they use, whereas DAC chips that are flexible about fixed or variable sample!
>>   rate do not need a clock, per se, because they have a "convert" signal to load each new value. There is clearly some overlap in the design here, but the point is that you want to think about what the CPU is required to do to feed the DAC. In general, a DAC that is capable of variable...
>
>
>> ... CODEC without each signal interfering with the other. But that's an example of way too many bits in each word and way too many data transfers per conversion to be an effici!
>>  ent model. Your CPU will run out of power an order of magnitude faster with this approach.
>
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From cheater00social at gmail.com  Sun Dec 10 21:42:22 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sun, 10 Dec 2023 21:42:22 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
Message-ID: <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>

On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz <dkantowitz at gmail.com>
wrote:

> The carry-bit NCO technique is also equivalent to a 1-bit first order
> sigma delta DAC.
>

Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned before
your email.


> Probably doesn't make it much easier to understand, but it does make the
> design conclusions from sigma delta usable.  Ex. noise shaping curves,
> required Over Sampling Rates vs ENOB, reconstruction filtering (see:
> https://en.wikipedia.org/wiki/Delta-sigma_modulation).
>
> To help myself visualize this, I plotted the output bit patterns for each
> input level.  Both modulation algorithms (1-bit carry NCO and SD-1)
> produced the same chart.
>
> DC level is y-axis, time is x-axis.
>

I'm having trouble understanding these graphs. What's going on in them? "DC
level is y-axis" doesn't seem to make sense in a plot that has multiple y
values per one x value. What am I missing here?


> [image: image.png]
> Repeated 4 times to help imagine the oversampling:
> [image: image.png]
>
> For comparison basic PWM looks like:
> [image: image.png]
>
> By looking across a horizontal line, you can easily see the carry-bit
> approach has a vast reduction in low frequency content compared to PWM.
> That is, the digital signal 'noise' is being pushed into higher
> frequencies.  However, there's still plenty of repeating pattern in the
> NCO/SD-1
>
>
> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net>
> wrote:
>
>> Honestly, it's not. It's just that damn simple. The version I actually
>> wrote was all hardware module set-up specific to the device, and basically
>> nothing else, so wouldn't tell you anything. Turning it all into software
>> loses a lot of the benefit, so doesn't make much sense, except to explain
>> it.
>>
>> Play with some NCOs a bit, and then get them to make a single pulse when
>> they wrap. And then - Bingo! You're there!
>>
>> If you thought something was missing, what exactly? Ask a more specific
>> question and perhaps I can help fill in a blank. I well remember how weird
>> this stuff seemed when I first met it, so I think I understand the position
>> you're in now.
>>
>>
>> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com>
>> wrote:
>> >
>> > I don't get it. Most of the algorithm is missing.
>> >
>> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net>
>> wrote:
>> >>
>> >>
>> >>
>> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com>
>> wrote:
>> >>
>> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net>
>> wrote:
>> >>
>> >>
>> >>
>> >>
>> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
>> synth-diy at synth-diy.org> wrote:
>> >>
>> >> If PDM means PWM with bit-reversal before the comparison (such as
>> Richie
>> >> describes), then it does indeed lock you into a lower sampling rate,
>> and
>> >> that's one reason I skipped describing *that* technique.  But PWM with
>> >> bit-reversal seems not to be what you mean when you say PDM.
>> >>
>> >>
>> >> That's not what I meant when I said PDM, certainly.
>> >>
>> >> The way I generated it is using an NCO. The NCO generates a
>> single-shot output pulse everytime the phase accumulator wraps.
>> >>
>> >> Now consider what happens with a simple 8-bit NCO. If our frequency
>> increment is 2, for example, we get a single output pulse every 128 clocks,
>> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
>> not next to each other like PWM. The output frequency would be (clock
>> frequency / 128) in this situation.
>> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses
>> per 256 clocks, and again, they're nicely spaced out. The output frequency
>> is now up to (clock /32) so there's been a big improvement, just by getting
>> away from those extreme values a little bit.
>> >> As the increment climbs, the accumulator wraps more and more often. At
>> freq=128, every other clock is an output and we reach our maximum output
>> frequency of (clock/2). As the increment goes above half, we start staying
>> high for more than a single pulse, and the waveform effectively turns the
>> other way up and we get a mirror image of the effect we've seen from 0-128.
>> >>
>> >> HTH,
>> >> Tom
>> >>
>> >>
>> >> I've read this a few times but I'm struggling to understand what's
>> >> going on. Can someone type out an algorithm or something like that?
>> >> Would appreciate it a lot. Thanks.
>> >>
>> >>
>> >> Ok, it'd look something like this:
>> >>
>> >> phase: 16-bit variable (for example)
>> >> freq: 16-bit variable (same as phase)
>> >>
>> >> So we do:
>> >>
>> >> // Increment phase accumulator
>> >> phase = phase + freq
>> >>
>> >> // Did phase wraparound?
>> >> If (phase>65535) { // There are probably better ways to do this test,
>> if it's even required.
>> >> // Ok, phase wrapped
>> >> phase = phase % 65536
>> >> // output a pulse a single clock in length
>> >> <this is implementation dependent!>
>> >> }
>> >>
>> >> All you need to do is run this code at a fast clock rate and you're
>> off. Of course, the better way is if you can hand some of this overhead to
>> hardware, and some modern uPs include NCOs as a peripheral and can be set
>> up for this "single shot pulse output" mode, which means that the while
>> thing boils down to simply updating the "freq" frequency increment variable
>> with your current output. It's dead simple.
>> >>
>> >>
>> >> There's a page about NCOs in general on my website:
>> >>
>> >> https://electricdruid.net/direct-digital-synthesis/
>> >>
>> >> HTH,
>> >> Tom
>> >>
>> >>
>>
>>
>> _______________________________________________
>> Synth-diy mailing list
>> Synth-diy at synth-diy.org
>> http://synth-diy.org/mailman/listinfo/synth-diy
>> Selling or trading? Use marketplace at synth-diy.org
>>
>
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From cheater00social at gmail.com  Sun Dec 10 21:42:54 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Sun, 10 Dec 2023 21:42:54 +0100
Subject: [sdiy] My paper on vacuum tube circuits...
In-Reply-To: <13866EA2-E5C3-486A-AC96-C68DB5F355A5@ece.gatech.edu>
References: <13866EA2-E5C3-486A-AC96-C68DB5F355A5@ece.gatech.edu>
Message-ID: <CAGn5V--LUXgc11UhM1xxxxeZadjZNt0E9iB2V9zw9_xhsA-A6A@mail.gmail.com>

Thanks Aaron! :)

On Sat, Dec 2, 2023 at 1:18?AM Lanterman, Aaron D via Synth-diy
<synth-diy at synth-diy.org> wrote:
>
> ?for those interested in such things:
>
> https://www.mdpi.com/2079-9292/12/23/4804
>
> ?On the Application of Thevenin Equivalent Circuits to the Analysis of Vacuum Tube Circuits?
>
> It?s open access so it?s not behind a paywall.
>
> In it, I adapt the techniques my colleague Marshall Leach used to explain transistor circuits to vacuum tubes. I use these equivalent circuits when teaching my Guitar Amplification and Effects class (which I?m running again this Spring):
>
> https://www.youtube.com/playlist?list=PLOunECWxELQS7JV_KeeTJJpgGjOftoaAH
>
> I use Marshall?s transistor techniques when I teach ECE3400: Analog Electronics (I think I?m the only instructor to do so since Marshall passed away):
>
> https://www.youtube.com/playlist?list=PLOunECWxELQSbOv3ekzuwC4K8ygV-Jkiy
>
> Aaron Lanterman, Prof. of ECE, Georgia Tech
> My blog on Education and Innovation: https://edupocalypsenow.wordpress.com
> My blog on Electronics and Programming: https://lantertronics.blogspot.com
> My YouTube channel on Electronics and Programming: https://www.youtube.com/c/lantertronics
>
>
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From mbryant at futurehorizons.com  Sun Dec 10 22:07:33 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sun, 10 Dec 2023 21:07:33 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBWr2kprdvXyGSxeFBjeEyxskqeAXZime0R12A2Q1bnUrg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
 <CWLP265MB7132EDEFB60BE4BB2EA094FCDB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAP92RBWr2kprdvXyGSxeFBjeEyxskqeAXZime0R12A2Q1bnUrg@mail.gmail.com>
Message-ID: <CWLP265MB7132707F9760E1423B61A229DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

The current cost of passives amazes me.  Even 20 years ago I used a cent per component for all the non-special Rs and Cs as a guideline to price.

________________________________
From: Mattias Rickardsson <mr at analogue.org>
Sent: 10 December 2023 19:25
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: brianw <brianw at audiobanshee.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

Den s?n 10 dec. 2023 12:55Mike Bryant <mbryant at futurehorizons.com<mailto:mbryant at futurehorizons.com>> skrev:
You're being robbed.  Should be $0.0015 !!  :-)

Haha! I was including the PCB mounting cost. :-D

/mr


From: Synth-diy <synth-diy-bounces at synth-diy.org<mailto:synth-diy-bounces at synth-diy.org>> on behalf of Mattias Rickardsson <mr at analogue.org<mailto:mr at analogue.org>>

One question I have is, "How much reconstruction filtering is necessary?"

It was enough with an extra RC link directly after the mux cap, before the buffer op-amp. Added cost: ~0.008 $ per CV channel.

/mr

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From ben at stuyts.nl  Sun Dec 10 22:25:15 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Sun, 10 Dec 2023 22:25:15 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBXZN6BCP+vG4+5dsXk2iwR_adOjKyJJVGcNoKTspQgPZg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
 <CAP92RBXZN6BCP+vG4+5dsXk2iwR_adOjKyJJVGcNoKTspQgPZg@mail.gmail.com>
Message-ID: <0BF54A25-16E5-49D7-AA88-7BDF339CEC3D@stuyts.nl>

<duh> I see it in my email too. I was looking at the wrong part.</duh>

So it?s not in the archive, and several others have chimed in that they?ve seen it too. So it?s probably for everyone. I see that this occurs inside rather long lines, so perhaps it?s some sort of buffer length limitation in Mailman. I?ll have a look?

Ben

> On 10 Dec 2023, at 20:28, Mattias Rickardsson <mr at analogue.org> wrote:
> 
> Den s?n 10 dec. 2023 19:31Ben Stuyts <ben at stuyts.nl <mailto:ben at stuyts.nl>> skrev:
>> Hi Mattias,
>> 
>> Is this is the message you are quoting? https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html If so, I do not see it in my copy of the message, nor in the Archive. So it could be something in your mail client? Or forwarder? ;-)
> 
> 
> Touch?!!!  :'-D
> 
> /mr - not referring to the Buchla 
> 
> 
>> 
>>> On 10 Dec 2023, at 13:03, Mattias Rickardsson <mr at analogue.org <mailto:mr at analogue.org>> wrote:
>>> 
>>> [snip]
>>> PS: on the topic of strangenesses in emails, what's the cause of the inserted  [exclamation point + newline + whitespace]  in long paragraphs? See:
>>> 
>>> 
>>>> ... as a message comes in, rather than a DAC that needs a continuous data stream (usually fed from a waveform buffer). DAC chips that operate on a fixed sample rate require a clock signal as part of the serial bus that they use, whereas DAC chips that are flexible about fixed or variable sample!
>>>>   rate do not need a clock, per se, because they have a "convert" signal to load each new value. There is clearly some overlap in the design here, but the point is that you want to think about what the CPU is required to do to feed the DAC. In general, a DAC that is capable of variable...
>>> 
>>> 
>>>> ... CODEC without each signal interfering with the other. But that's an example of way too many bits in each word and way too many data transfers per conversion to be an effici!
>>>>  ent model. Your CPU will run out of power an order of magnitude faster with this approach.
>> 

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From gordonjcp at gjcp.net  Sun Dec 10 22:33:57 2023
From: gordonjcp at gjcp.net (Gordonjcp)
Date: Sun, 10 Dec 2023 21:33:57 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
Message-ID: <20231210213357.GA22300@gjcp.net>

On Sun, Dec 10, 2023 at 11:44:11AM -0800, brianw wrote:
> 
> I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.

How can you tell that's down to poor reconstruction filtering, as opposed to generated aliasing from the numerical side?

-- 
Gordonjcp



From mr at analogue.org  Sun Dec 10 22:53:26 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Sun, 10 Dec 2023 22:53:26 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132707F9760E1423B61A229DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
 <CWLP265MB7132EDEFB60BE4BB2EA094FCDB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAP92RBWr2kprdvXyGSxeFBjeEyxskqeAXZime0R12A2Q1bnUrg@mail.gmail.com>
 <CWLP265MB7132707F9760E1423B61A229DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAP92RBUfTDsANwhZScV8aj=u17-p3fU6ptFWc7J340JKAVL3KQ@mail.gmail.com>

Mike Bryant <mbryant at futurehorizons.com> skrev:

> The current cost of passives amazes me.  Even 20 years ago I used a cent
> per component for all the non-special Rs and Cs as a guideline to price.
>

Amazes you in what way?

0.1 cent per passive and 0.3 cents each for mounting them... is what I
heard some 7 years ago. Not sure how that compares to current (or voltage!)
prices. :-)

/mr
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From mbryant at futurehorizons.com  Sun Dec 10 23:00:36 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sun, 10 Dec 2023 22:00:36 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBUfTDsANwhZScV8aj=u17-p3fU6ptFWc7J340JKAVL3KQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
 <CWLP265MB7132EDEFB60BE4BB2EA094FCDB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAP92RBWr2kprdvXyGSxeFBjeEyxskqeAXZime0R12A2Q1bnUrg@mail.gmail.com>
 <CWLP265MB7132707F9760E1423B61A229DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAP92RBUfTDsANwhZScV8aj=u17-p3fU6ptFWc7J340JKAVL3KQ@mail.gmail.com>
Message-ID: <CWLP265MB713254C4D256DDF5AC5F7731DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Yes but 20 years ago it was a cent per passive and 0.5 cents for mounting at a major mixer company.

________________________________
From: Mattias Rickardsson <mr at analogue.org>
Sent: 10 December 2023 21:53
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: brianw <brianw at audiobanshee.com>; SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

Mike Bryant <mbryant at futurehorizons.com<mailto:mbryant at futurehorizons.com>> skrev:
The current cost of passives amazes me.  Even 20 years ago I used a cent per component for all the non-special Rs and Cs as a guideline to price.

Amazes you in what way?

0.1 cent per passive and 0.3 cents each for mounting them... is what I heard some 7 years ago. Not sure how that compares to current (or voltage!) prices. :-)

/mr

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From tom at electricdruid.net  Sun Dec 10 23:11:32 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Sun, 10 Dec 2023 22:11:32 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
Message-ID: <1B77BFD1-7672-4EEF-B059-BA1A9805C65C@electricdruid.net>

Thank you very much for that, David.

Not only is that a fantastic way to visualise what's going on and the difference between these different techniques (vastly different as your images show - and also why staying away from the last few percent top and bottom helps quite a lot, as I mentioned), but it also gave me one of those "AHA!" moments about other NCO things that I've been muling over for a long time. I hadn't thought of laying it out in the way you've done, but that makes everything far clearer, so thank you for that too!

Tom

==================
       Electric Druid
Synth & Stompbox DIY
==================



> On 10 Dec 2023, at 19:36, David Kantowitz <dkantowitz at gmail.com> wrote:
> 
> The carry-bit NCO technique is also equivalent to a 1-bit first order sigma delta DAC.  Probably doesn't make it much easier to understand, but it does make the design conclusions from sigma delta usable.  Ex. noise shaping curves, required Over Sampling Rates vs ENOB, reconstruction filtering (see: https://en.wikipedia.org/wiki/Delta-sigma_modulation <https://en.wikipedia.org/wiki/Delta-sigma_modulation>).
> 
> To help myself visualize this, I plotted the output bit patterns for each input level.  Both modulation algorithms (1-bit carry NCO and SD-1) produced the same chart.
> 
> DC level is y-axis, time is x-axis.
> <image.png>
> Repeated 4 times to help imagine the oversampling:
> <image.png>
> 
> For comparison basic PWM looks like:
> <image.png>
> 
> By looking across a horizontal line, you can easily see the carry-bit approach has a vast reduction in low frequency content compared to PWM.  That is, the digital signal 'noise' is being pushed into higher frequencies.  However, there's still plenty of repeating pattern in the NCO/SD-1 
> 
> 
> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> 
> Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> 
> If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> 
> 
> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
> > 
> > I don't get it. Most of the algorithm is missing.
> > 
> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> >> 
> >> 
> >> 
> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
> >> 
> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> >> 
> >> 
> >> 
> >> 
> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org <mailto:synth-diy at synth-diy.org>> wrote:
> >> 
> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> >> describes), then it does indeed lock you into a lower sampling rate, and
> >> that's one reason I skipped describing *that* technique.  But PWM with
> >> bit-reversal seems not to be what you mean when you say PDM.
> >> 
> >> 
> >> That's not what I meant when I said PDM, certainly.
> >> 
> >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> >> 
> >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> >> 
> >> HTH,
> >> Tom
> >> 
> >> 
> >> I've read this a few times but I'm struggling to understand what's
> >> going on. Can someone type out an algorithm or something like that?
> >> Would appreciate it a lot. Thanks.
> >> 
> >> 
> >> Ok, it'd look something like this:
> >> 
> >> phase: 16-bit variable (for example)
> >> freq: 16-bit variable (same as phase)
> >> 
> >> So we do:
> >> 
> >> // Increment phase accumulator
> >> phase = phase + freq
> >> 
> >> // Did phase wraparound?
> >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> >> // Ok, phase wrapped
> >> phase = phase % 65536
> >> // output a pulse a single clock in length
> >> <this is implementation dependent!>
> >> }
> >> 
> >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> >> 
> >> 
> >> There's a page about NCOs in general on my website:
> >> 
> >> https://electricdruid.net/direct-digital-synthesis/ <https://electricdruid.net/direct-digital-synthesis/>
> >> 
> >> HTH,
> >> Tom
> >> 
> >> 
> 
> 
> _______________________________________________
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From ben at stuyts.nl  Sun Dec 10 23:28:08 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Sun, 10 Dec 2023 23:28:08 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <0BF54A25-16E5-49D7-AA88-7BDF339CEC3D@stuyts.nl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
 <CAP92RBXZN6BCP+vG4+5dsXk2iwR_adOjKyJJVGcNoKTspQgPZg@mail.gmail.com>
 <0BF54A25-16E5-49D7-AA88-7BDF339CEC3D@stuyts.nl>
Message-ID: <22C587F4-0B13-4B78-8F9D-47A860340496@stuyts.nl>

Ok, it?s not a bug in Mailman, it originates in Sendmail, the service that actually contacts all the other mail servers to deliver the mail. In Brian?s email, the line is truncated after 990 characters. This is conform the RFC 5321 standard, section 4.5.3.1.6 which states that it must be no longer than 1000 characters. (https://www.rfc-editor.org/rfc/rfc5321.html#section-4.5.3.1.6)

So Brian?s mail service does not respect this limit, and perhaps it?s not too important nowadays. But the synth-diy server does respect it, and trims the line with an exclamation point and continues on a new line. Unfortunately, the RFC does not specify how to handle longer lines, so at least no information is lost this way. It looks like Sendmail does this for *outgoing* messages only, and that?s the reason the Archive is OK. 

In any case, I?m not going to screw with it. But thanks for the report, I?ve learned something new. Back to your regular schedule of DAC?s and MUX?s. :-)

Ben (sorry for the admin blabber)

> On 10 Dec 2023, at 22:25, Ben Stuyts <ben at stuyts.nl> wrote:
> 
> <duh> I see it in my email too. I was looking at the wrong part.</duh>
> 
> So it?s not in the archive, and several others have chimed in that they?ve seen it too. So it?s probably for everyone. I see that this occurs inside rather long lines, so perhaps it?s some sort of buffer length limitation in Mailman. I?ll have a look?
> 
> Ben
> 
>> On 10 Dec 2023, at 20:28, Mattias Rickardsson <mr at analogue.org> wrote:
>> 
>> Den s?n 10 dec. 2023 19:31Ben Stuyts <ben at stuyts.nl <mailto:ben at stuyts.nl>> skrev:
>>> Hi Mattias,
>>> 
>>> Is this is the message you are quoting? https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html If so, I do not see it in my copy of the message, nor in the Archive. So it could be something in your mail client? Or forwarder? ;-)
>> 
>> 
>> Touch?!!!  :'-D
>> 
>> /mr - not referring to the Buchla 
>> 
>> 
>>> 
>>>> On 10 Dec 2023, at 13:03, Mattias Rickardsson <mr at analogue.org <mailto:mr at analogue.org>> wrote:
>>>> 
>>>> [snip]
>>>> PS: on the topic of strangenesses in emails, what's the cause of the inserted  [exclamation point + newline + whitespace]  in long paragraphs? See:
>>>> 
>>>> 
>>>>> ... as a message comes in, rather than a DAC that needs a continuous data stream (usually fed from a waveform buffer). DAC chips that operate on a fixed sample rate require a clock signal as part of the serial bus that they use, whereas DAC chips that are flexible about fixed or variable sample!
>>>>>   rate do not need a clock, per se, because they have a "convert" signal to load each new value. There is clearly some overlap in the design here, but the point is that you want to think about what the CPU is required to do to feed the DAC. In general, a DAC that is capable of variable...
>>>> 
>>>> 
>>>>> ... CODEC without each signal interfering with the other. But that's an example of way too many bits in each word and way too many data transfers per conversion to be an effici!
>>>>>  ent model. Your CPU will run out of power an order of magnitude faster with this approach.
>>> 
> 

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From mbryant at futurehorizons.com  Sun Dec 10 23:29:51 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sun, 10 Dec 2023 22:29:51 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <20231210213357.GA22300@gjcp.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
Message-ID: <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

I'd vote for it being digitally generated aliasing - all too common a mistake.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Gordonjcp <gordonjcp at gjcp.net>
Sent: 10 December 2023 21:33
To: synth-diy at synth-diy.org <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

On Sun, Dec 10, 2023 at 11:44:11AM -0800, brianw wrote:
>
> I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.

How can you tell that's down to poor reconstruction filtering, as opposed to generated aliasing from the numerical side?

--
Gordonjcp

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From mbryant at futurehorizons.com  Sun Dec 10 23:33:16 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Sun, 10 Dec 2023 22:33:16 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
Message-ID: <CWLP265MB7132E2B4F72C9A69150578F8DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Interesting and enlightening proof.
Is this in C or Matlab or something that you could share so we could try seeing the effect of modification to the algorithms visually.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of David Kantowitz via Synth-diy <synth-diy at synth-diy.org>
Sent: 10 December 2023 19:36
To: Tom Wiltshire <tom at electricdruid.net>
Cc: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

The carry-bit NCO technique is also equivalent to a 1-bit first order sigma delta DAC.  Probably doesn't make it much easier to understand, but it does make the design conclusions from sigma delta usable.  Ex. noise shaping curves, required Over Sampling Rates vs ENOB, reconstruction filtering (see: https://en.wikipedia.org/wiki/Delta-sigma_modulation).

To help myself visualize this, I plotted the output bit patterns for each input level.  Both modulation algorithms (1-bit carry NCO and SD-1) produced the same chart.

DC level is y-axis, time is x-axis.
[image.png]
Repeated 4 times to help imagine the oversampling:
[image.png]

For comparison basic PWM looks like:
[image.png]

By looking across a horizontal line, you can easily see the carry-bit approach has a vast reduction in low frequency content compared to PWM.  That is, the digital signal 'noise' is being pushed into higher frequencies.  However, there's still plenty of repeating pattern in the NCO/SD-1


On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net<mailto:tom at electricdruid.net>> wrote:
Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.

Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!

If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.


> On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com<mailto:cheater00social at gmail.com>> wrote:
>
> I don't get it. Most of the algorithm is missing.
>
> On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net<mailto:tom at electricdruid.net>> wrote:
>>
>>
>>
>> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com<mailto:cheater00social at gmail.com>> wrote:
>>
>> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net<mailto:tom at electricdruid.net>> wrote:
>>
>>
>>
>>
>> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org<mailto:synth-diy at synth-diy.org>> wrote:
>>
>> If PDM means PWM with bit-reversal before the comparison (such as Richie
>> describes), then it does indeed lock you into a lower sampling rate, and
>> that's one reason I skipped describing *that* technique.  But PWM with
>> bit-reversal seems not to be what you mean when you say PDM.
>>
>>
>> That's not what I meant when I said PDM, certainly.
>>
>> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>>
>> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
>> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
>> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>>
>> HTH,
>> Tom
>>
>>
>> I've read this a few times but I'm struggling to understand what's
>> going on. Can someone type out an algorithm or something like that?
>> Would appreciate it a lot. Thanks.
>>
>>
>> Ok, it'd look something like this:
>>
>> phase: 16-bit variable (for example)
>> freq: 16-bit variable (same as phase)
>>
>> So we do:
>>
>> // Increment phase accumulator
>> phase = phase + freq
>>
>> // Did phase wraparound?
>> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
>> // Ok, phase wrapped
>> phase = phase % 65536
>> // output a pulse a single clock in length
>> <this is implementation dependent!>
>> }
>>
>> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
>>
>>
>> There's a page about NCOs in general on my website:
>>
>> https://electricdruid.net/direct-digital-synthesis/
>>
>> HTH,
>> Tom
>>
>>


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From cheater00social at gmail.com  Mon Dec 11 01:47:28 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Mon, 11 Dec 2023 01:47:28 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>

brian said you have to record the output at over 44.1 to see it,
meaning it's above fs/2, meaning it can only be imaging due to a bad
reconstruction. aliasing from algorithms is below fs/2. case closed.

On Sun, Dec 10, 2023 at 11:32?PM Mike Bryant <mbryant at futurehorizons.com> wrote:
>
> I'd vote for it being digitally generated aliasing - all too common a mistake.
>
> ________________________________
> From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Gordonjcp <gordonjcp at gjcp.net>
> Sent: 10 December 2023 21:33
> To: synth-diy at synth-diy.org <synth-diy at synth-diy.org>
> Subject: Re: [sdiy] Generating a large number of CV outputs
>
> On Sun, Dec 10, 2023 at 11:44:11AM -0800, brianw wrote:
> >
> > I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.
>
> How can you tell that's down to poor reconstruction filtering, as opposed to generated aliasing from the numerical side?
>
> --
> Gordonjcp
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
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> Selling or trading? Use marketplace at synth-diy.org
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From brianw at audiobanshee.com  Mon Dec 11 01:47:31 2023
From: brianw at audiobanshee.com (brianw)
Date: Sun, 10 Dec 2023 16:47:31 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <15531FCE-D6FC-4DA8-86DD-6D9963F9EDA2@audiobanshee.com>

Ah: To use the correct terminology, I saw images above 22.05 kHz, and it's basically impossible for these artists to have been running the converters on their laptops at any sample rate above 44.1 kHz, so it wasn't part of the digital generation.

I regularly see aliasing in recordings, and usually chalk that up to samples, digital generation, vintage gear, and who knows what else. Anything below 22.05 kHz would be difficult to identify as to its original source.

Basically, if I record at 48 kHz or higher, I can see a mirror image of the linear spectrum reflected around 22.05 kHz.

Brian


On Dec 10, 2023, at 2:29 PM, Mike Bryant <mbryant at futurehorizons.com> wrote:
> I'd vote for it being digitally generated aliasing - all too common a mistake.
> 
> From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Gordonjcp <gordonjcp at gjcp.net>
> Sent: 10 December 2023 21:33
>  
> On Sun, Dec 10, 2023 at 11:44:11AM -0800, brianw wrote:
> > 
> > I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.
> 
> How can you tell that's down to poor reconstruction filtering, as opposed to generated aliasing from the numerical side?
> 
> -- 
> Gordonjcp




From brianw at audiobanshee.com  Mon Dec 11 02:02:09 2023
From: brianw at audiobanshee.com (brianw)
Date: Sun, 10 Dec 2023 17:02:09 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
Message-ID: <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>

Exactly.

My paragraph followed a question about minimal reconstruction filtering, which is what removes images after a DAC (anti-aliasing filters prevent aliasing during ADC). Since I've seen commercial products that failed to remove images of their DAC output, I wanted to ensure that my designs don't suffer the same mistakes.

The challenge is that reconstruction filters can be expensive to do correctly, unless there's significant oversampling (which is expensive on the digital processing side). It's easy enough to plop down a single-pole low-pass, but that's not good enough in nearly all cases.

On the one hand, I'd like to agree that CV does not need reconstruction filtering. In fact, I've gotten into seemingly unsolvable arguments around the design table because DC is *always* below the Shannon-Nyquist frequency, but some folks want to blindly filter anyway. I'm not quite sure of the mathematical terminology to use, but producing a clean impulse response - although equivalent to frequency response - is a very different consideration. i.e. Even if you don't need to reproduce periodic signals with a high frequency, you might get into the same challenges if you want a clean impulse response.

On the other hand, it's so very tempting and useful to generate periodic signal on CV channels, so it's at least beneficial to consider what solutions (oversampling, higher-order reconstruction filtering, or perhaps both) would be best.

Brian


On Dec 10, 2023, at 4:47 PM, cheater cheater wrote:
> brian said you have to record the output at over 44.1 to see it,
> meaning it's above fs/2, meaning it can only be imaging due to a bad
> reconstruction. aliasing from algorithms is below fs/2. case closed.
> 
> On Sun, Dec 10, 2023 at 11:32?PM Mike Bryant <mbryant at futurehorizons.com> wrote:
>> I'd vote for it being digitally generated aliasing - all too common a mistake.
>> 
>> ________________________________
>> From: Gordonjcp
>> Sent: 10 December 2023 21:33
>> 
>> On Sun, Dec 10, 2023 at 11:44:11AM -0800, brianw wrote:
>>> I've recorded enough live electronic music performances to know that there is a surprisingly large number of commercial products out there with digital-to-analog conversion that has insufficient reconstruction filtering, as evidenced by the horrible aliasing. Granted, you have to record higher than 44.1 kHz to see this, since most DAC hardware is running at least that sample rate or higher.
>> 
>> How can you tell that's down to poor reconstruction filtering, as opposed to generated aliasing from the numerical side?
>> 
>> --
>> Gordonjcp




From dkantowitz at gmail.com  Mon Dec 11 06:30:49 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Sun, 10 Dec 2023 21:30:49 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132E2B4F72C9A69150578F8DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CWLP265MB7132E2B4F72C9A69150578F8DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CAEfLrHGXffKDtvKav46+DRtMVsL=WFUn8uTfTdb-PK2MLw4Kpw@mail.gmail.com>

Python notebook attached.  Very unsophisticated code; only intended to draw
the pictures.
Uses numpy ... basically matlab in python.

On Sun, Dec 10, 2023 at 2:33?PM Mike Bryant <mbryant at futurehorizons.com>
wrote:

> Interesting and enlightening proof.
> Is this in C or Matlab or something that you could share so we could try
> seeing the effect of modification to the algorithms visually.
>
> ------------------------------
> *From:* Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of David
> Kantowitz via Synth-diy <synth-diy at synth-diy.org>
> *Sent:* 10 December 2023 19:36
> *To:* Tom Wiltshire <tom at electricdruid.net>
> *Cc:* SDIY <synth-diy at synth-diy.org>
> *Subject:* Re: [sdiy] Generating a large number of CV outputs
>
> The carry-bit NCO technique is also equivalent to a 1-bit first order
> sigma delta DAC.  Probably doesn't make it much easier to understand, but
> it does make the design conclusions from sigma delta usable.  Ex. noise
> shaping curves, required Over Sampling Rates vs ENOB, reconstruction
> filtering (see: https://en.wikipedia.org/wiki/Delta-sigma_modulation).
>
> To help myself visualize this, I plotted the output bit patterns for each
> input level.  Both modulation algorithms (1-bit carry NCO and SD-1)
> produced the same chart.
>
> DC level is y-axis, time is x-axis.
> [image: image.png]
> Repeated 4 times to help imagine the oversampling:
> [image: image.png]
>
> For comparison basic PWM looks like:
> [image: image.png]
>
> By looking across a horizontal line, you can easily see the carry-bit
> approach has a vast reduction in low frequency content compared to PWM.
> That is, the digital signal 'noise' is being pushed into higher
> frequencies.  However, there's still plenty of repeating pattern in the
> NCO/SD-1
>
>
> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net>
> wrote:
>
> Honestly, it's not. It's just that damn simple. The version I actually
> wrote was all hardware module set-up specific to the device, and basically
> nothing else, so wouldn't tell you anything. Turning it all into software
> loses a lot of the benefit, so doesn't make much sense, except to explain
> it.
>
> Play with some NCOs a bit, and then get them to make a single pulse when
> they wrap. And then - Bingo! You're there!
>
> If you thought something was missing, what exactly? Ask a more specific
> question and perhaps I can help fill in a blank. I well remember how weird
> this stuff seemed when I first met it, so I think I understand the position
> you're in now.
>
>
> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com>
> wrote:
> >
> > I don't get it. Most of the algorithm is missing.
> >
> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net>
> wrote:
> >>
> >>
> >>
> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com>
> wrote:
> >>
> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net>
> wrote:
> >>
> >>
> >>
> >>
> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
> synth-diy at synth-diy.org> wrote:
> >>
> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> >> describes), then it does indeed lock you into a lower sampling rate, and
> >> that's one reason I skipped describing *that* technique.  But PWM with
> >> bit-reversal seems not to be what you mean when you say PDM.
> >>
> >>
> >> That's not what I meant when I said PDM, certainly.
> >>
> >> The way I generated it is using an NCO. The NCO generates a single-shot
> output pulse everytime the phase accumulator wraps.
> >>
> >> Now consider what happens with a simple 8-bit NCO. If our frequency
> increment is 2, for example, we get a single output pulse every 128 clocks,
> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
> not next to each other like PWM. The output frequency would be (clock
> frequency / 128) in this situation.
> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses
> per 256 clocks, and again, they're nicely spaced out. The output frequency
> is now up to (clock /32) so there's been a big improvement, just by getting
> away from those extreme values a little bit.
> >> As the increment climbs, the accumulator wraps more and more often. At
> freq=128, every other clock is an output and we reach our maximum output
> frequency of (clock/2). As the increment goes above half, we start staying
> high for more than a single pulse, and the waveform effectively turns the
> other way up and we get a mirror image of the effect we've seen from 0-128.
> >>
> >> HTH,
> >> Tom
> >>
> >>
> >> I've read this a few times but I'm struggling to understand what's
> >> going on. Can someone type out an algorithm or something like that?
> >> Would appreciate it a lot. Thanks.
> >>
> >>
> >> Ok, it'd look something like this:
> >>
> >> phase: 16-bit variable (for example)
> >> freq: 16-bit variable (same as phase)
> >>
> >> So we do:
> >>
> >> // Increment phase accumulator
> >> phase = phase + freq
> >>
> >> // Did phase wraparound?
> >> If (phase>65535) { // There are probably better ways to do this test,
> if it's even required.
> >> // Ok, phase wrapped
> >> phase = phase % 65536
> >> // output a pulse a single clock in length
> >> <this is implementation dependent!>
> >> }
> >>
> >> All you need to do is run this code at a fast clock rate and you're
> off. Of course, the better way is if you can hand some of this overhead to
> hardware, and some modern uPs include NCOs as a peripheral and can be set
> up for this "single shot pulse output" mode, which means that the while
> thing boils down to simply updating the "freq" frequency increment variable
> with your current output. It's dead simple.
> >>
> >>
> >> There's a page about NCOs in general on my website:
> >>
> >> https://electricdruid.net/direct-digital-synthesis/
> >>
> >> HTH,
> >> Tom
> >>
> >>
>
>
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org
> http://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
>
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From cheater00social at gmail.com  Mon Dec 11 09:59:14 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Mon, 11 Dec 2023 09:59:14 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
Message-ID: <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>

Thanks, sorry, I still don't understand this:

> Each horizontal row of the chart is the waveform generated for the
constant input on the y-axis.

what do you mean by that?

BTW, it's probably useful to send these emails to the list.


On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com>
wrote:

> "carry-bit NCO" is how I summarized the approach Tom uses: output a pulse
> whenever the counter overflows.
>
> Each horizontal row of the chart is the waveform generated for the
> constant input on the y-axis.
> y=0 -> row of all zeros (white)
> y=256 -> row of all ones (black)
> y=128 -> row of alternating ones and zeros
>
> The interesting parts are really:
>   a) Overflow bit approach is _vastly_ better than PWM.
>   b) Most microcontrollers have a timer/counter peripheral where you can
> implement this in hardware, having almost no s/w cost, and runnig around
> the uC's clock rate (several MHz).
>   c) 1st order sigma delta converters are garbage: need a hefty
> oversampling rate and noise rises like a 45 degree line through the
> passband.
>
>
>
> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater <
> cheater00social at gmail.com> wrote:
>
>>
>>
>> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz <dkantowitz at gmail.com>
>> wrote:
>>
>>> The carry-bit NCO technique is also equivalent to a 1-bit first order
>>> sigma delta DAC.
>>>
>>
>> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned
>> before your email.
>>
>>
>>> Probably doesn't make it much easier to understand, but it does make the
>>> design conclusions from sigma delta usable.  Ex. noise shaping curves,
>>> required Over Sampling Rates vs ENOB, reconstruction filtering (see:
>>> https://en.wikipedia.org/wiki/Delta-sigma_modulation).
>>>
>>> To help myself visualize this, I plotted the output bit patterns for
>>> each input level.  Both modulation algorithms (1-bit carry NCO and SD-1)
>>> produced the same chart.
>>>
>>> DC level is y-axis, time is x-axis.
>>>
>>
>> I'm having trouble understanding these graphs. What's going on in them?
>> "DC level is y-axis" doesn't seem to make sense in a plot that has multiple
>> y values per one x value. What am I missing here?
>>
>>
>>> [image: image.png]
>>> Repeated 4 times to help imagine the oversampling:
>>> [image: image.png]
>>>
>>> For comparison basic PWM looks like:
>>> [image: image.png]
>>>
>>> By looking across a horizontal line, you can easily see the carry-bit
>>> approach has a vast reduction in low frequency content compared to PWM.
>>> That is, the digital signal 'noise' is being pushed into higher
>>> frequencies.  However, there's still plenty of repeating pattern in the
>>> NCO/SD-1
>>>
>>>
>>> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net>
>>> wrote:
>>>
>>>> Honestly, it's not. It's just that damn simple. The version I actually
>>>> wrote was all hardware module set-up specific to the device, and basically
>>>> nothing else, so wouldn't tell you anything. Turning it all into software
>>>> loses a lot of the benefit, so doesn't make much sense, except to explain
>>>> it.
>>>>
>>>> Play with some NCOs a bit, and then get them to make a single pulse
>>>> when they wrap. And then - Bingo! You're there!
>>>>
>>>> If you thought something was missing, what exactly? Ask a more specific
>>>> question and perhaps I can help fill in a blank. I well remember how weird
>>>> this stuff seemed when I first met it, so I think I understand the position
>>>> you're in now.
>>>>
>>>>
>>>> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com>
>>>> wrote:
>>>> >
>>>> > I don't get it. Most of the algorithm is missing.
>>>> >
>>>> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net>
>>>> wrote:
>>>> >>
>>>> >>
>>>> >>
>>>> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com>
>>>> wrote:
>>>> >>
>>>> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net>
>>>> wrote:
>>>> >>
>>>> >>
>>>> >>
>>>> >>
>>>> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
>>>> synth-diy at synth-diy.org> wrote:
>>>> >>
>>>> >> If PDM means PWM with bit-reversal before the comparison (such as
>>>> Richie
>>>> >> describes), then it does indeed lock you into a lower sampling rate,
>>>> and
>>>> >> that's one reason I skipped describing *that* technique.  But PWM
>>>> with
>>>> >> bit-reversal seems not to be what you mean when you say PDM.
>>>> >>
>>>> >>
>>>> >> That's not what I meant when I said PDM, certainly.
>>>> >>
>>>> >> The way I generated it is using an NCO. The NCO generates a
>>>> single-shot output pulse everytime the phase accumulator wraps.
>>>> >>
>>>> >> Now consider what happens with a simple 8-bit NCO. If our frequency
>>>> increment is 2, for example, we get a single output pulse every 128 clocks,
>>>> or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart,
>>>> not next to each other like PWM. The output frequency would be (clock
>>>> frequency / 128) in this situation.
>>>> >> If the increment is 8, we get a output pulse every 32 clocks, 8
>>>> pulses per 256 clocks, and again, they're nicely spaced out. The output
>>>> frequency is now up to (clock /32) so there's been a big improvement, just
>>>> by getting away from those extreme values a little bit.
>>>> >> As the increment climbs, the accumulator wraps more and more often.
>>>> At freq=128, every other clock is an output and we reach our maximum output
>>>> frequency of (clock/2). As the increment goes above half, we start staying
>>>> high for more than a single pulse, and the waveform effectively turns the
>>>> other way up and we get a mirror image of the effect we've seen from 0-128.
>>>> >>
>>>> >> HTH,
>>>> >> Tom
>>>> >>
>>>> >>
>>>> >> I've read this a few times but I'm struggling to understand what's
>>>> >> going on. Can someone type out an algorithm or something like that?
>>>> >> Would appreciate it a lot. Thanks.
>>>> >>
>>>> >>
>>>> >> Ok, it'd look something like this:
>>>> >>
>>>> >> phase: 16-bit variable (for example)
>>>> >> freq: 16-bit variable (same as phase)
>>>> >>
>>>> >> So we do:
>>>> >>
>>>> >> // Increment phase accumulator
>>>> >> phase = phase + freq
>>>> >>
>>>> >> // Did phase wraparound?
>>>> >> If (phase>65535) { // There are probably better ways to do this
>>>> test, if it's even required.
>>>> >> // Ok, phase wrapped
>>>> >> phase = phase % 65536
>>>> >> // output a pulse a single clock in length
>>>> >> <this is implementation dependent!>
>>>> >> }
>>>> >>
>>>> >> All you need to do is run this code at a fast clock rate and you're
>>>> off. Of course, the better way is if you can hand some of this overhead to
>>>> hardware, and some modern uPs include NCOs as a peripheral and can be set
>>>> up for this "single shot pulse output" mode, which means that the while
>>>> thing boils down to simply updating the "freq" frequency increment variable
>>>> with your current output. It's dead simple.
>>>> >>
>>>> >>
>>>> >> There's a page about NCOs in general on my website:
>>>> >>
>>>> >> https://electricdruid.net/direct-digital-synthesis/
>>>> >>
>>>> >> HTH,
>>>> >> Tom
>>>> >>
>>>> >>
>>>>
>>>>
>>>> _______________________________________________
>>>> Synth-diy mailing list
>>>> Synth-diy at synth-diy.org
>>>> http://synth-diy.org/mailman/listinfo/synth-diy
>>>> Selling or trading? Use marketplace at synth-diy.org
>>>>
>>>
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From tom at electricdruid.net  Mon Dec 11 10:29:18 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Mon, 11 Dec 2023 09:29:18 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
Message-ID: <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>

He's plotted the output from the algorithm as black and white pixels (the x axis) for each "DAC output value" (the y-axis).

The difference between the "carry-bit NCO" approach (or whatever we want to call it) and the PWM output (the final diagram, half black, half white) is clear to see.

The important thing is the way that the black and white pixels are far more mixed up- e.g. the noise is of much higher frequency, and therefore much easier to filter out.


> On 11 Dec 2023, at 08:59, cheater cheater via Synth-diy <synth-diy at synth-diy.org> wrote:
> 
> Thanks, sorry, I still don't understand this:
> 
> > Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
> 
> what do you mean by that?
> 
> BTW, it's probably useful to send these emails to the list.
> 
> 
> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com <mailto:dkantowitz at gmail.com>> wrote:
> "carry-bit NCO" is how I summarized the approach Tom uses: output a pulse whenever the counter overflows.
> 
> Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
> y=0 -> row of all zeros (white)
> y=256 -> row of all ones (black)
> y=128 -> row of alternating ones and zeros
> 
> The interesting parts are really:
>   a) Overflow bit approach is _vastly_ better than PWM.
>   b) Most microcontrollers have a timer/counter peripheral where you can implement this in hardware, having almost no s/w cost, and runnig around the uC's clock rate (several MHz).
>   c) 1st order sigma delta converters are garbage: need a hefty oversampling rate and noise rises like a 45 degree line through the passband.
> 
> 
> 
> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
> 
> 
> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz <dkantowitz at gmail.com <mailto:dkantowitz at gmail.com>> wrote:
> The carry-bit NCO technique is also equivalent to a 1-bit first order sigma delta DAC.
> 
> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned before your email.
>  
> Probably doesn't make it much easier to understand, but it does make the design conclusions from sigma delta usable.  Ex. noise shaping curves, required Over Sampling Rates vs ENOB, reconstruction filtering (see: https://en.wikipedia.org/wiki/Delta-sigma_modulation <https://en.wikipedia.org/wiki/Delta-sigma_modulation>).
> 
> To help myself visualize this, I plotted the output bit patterns for each input level.  Both modulation algorithms (1-bit carry NCO and SD-1) produced the same chart.
> 
> DC level is y-axis, time is x-axis.
> 
> I'm having trouble understanding these graphs. What's going on in them? "DC level is y-axis" doesn't seem to make sense in a plot that has multiple y values per one x value. What am I missing here?
>  
> <image.png>
> Repeated 4 times to help imagine the oversampling:
> <image.png>
> 
> For comparison basic PWM looks like:
> <image.png>
> 
> By looking across a horizontal line, you can easily see the carry-bit approach has a vast reduction in low frequency content compared to PWM.  That is, the digital signal 'noise' is being pushed into higher frequencies.  However, there's still plenty of repeating pattern in the NCO/SD-1 
> 
> 
> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
> 
> Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
> 
> If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
> 
> 
> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
> > 
> > I don't get it. Most of the algorithm is missing.
> > 
> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> >> 
> >> 
> >> 
> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
> >> 
> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
> >> 
> >> 
> >> 
> >> 
> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org <mailto:synth-diy at synth-diy.org>> wrote:
> >> 
> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> >> describes), then it does indeed lock you into a lower sampling rate, and
> >> that's one reason I skipped describing *that* technique.  But PWM with
> >> bit-reversal seems not to be what you mean when you say PDM.
> >> 
> >> 
> >> That's not what I meant when I said PDM, certainly.
> >> 
> >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> >> 
> >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> >> 
> >> HTH,
> >> Tom
> >> 
> >> 
> >> I've read this a few times but I'm struggling to understand what's
> >> going on. Can someone type out an algorithm or something like that?
> >> Would appreciate it a lot. Thanks.
> >> 
> >> 
> >> Ok, it'd look something like this:
> >> 
> >> phase: 16-bit variable (for example)
> >> freq: 16-bit variable (same as phase)
> >> 
> >> So we do:
> >> 
> >> // Increment phase accumulator
> >> phase = phase + freq
> >> 
> >> // Did phase wraparound?
> >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> >> // Ok, phase wrapped
> >> phase = phase % 65536
> >> // output a pulse a single clock in length
> >> <this is implementation dependent!>
> >> }
> >> 
> >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> >> 
> >> 
> >> There's a page about NCOs in general on my website:
> >> 
> >> https://electricdruid.net/direct-digital-synthesis/ <https://electricdruid.net/direct-digital-synthesis/>
> >> 
> >> HTH,
> >> Tom
> >> 
> >> 
> 
> 
> _______________________________________________
> Synth-diy mailing list
> Synth-diy at synth-diy.org <mailto:Synth-diy at synth-diy.org>
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From cheater00social at gmail.com  Mon Dec 11 10:54:27 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Mon, 11 Dec 2023 10:54:27 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
 <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>
Message-ID: <CAGn5V-_N4+QHBmdSNuM1yCYakvCG6J5Pvpk5nWmUg9s6f8ZPiQ@mail.gmail.com>

> He's plotted the output from the algorithm as black and white pixels (the x axis) for each "DAC output value" (the y-axis).

ugh, still struggling. i don't know what that means. :S

On Mon, Dec 11, 2023 at 10:29?AM Tom Wiltshire <tom at electricdruid.net> wrote:
>
> He's plotted the output from the algorithm as black and white pixels (the x axis) for each "DAC output value" (the y-axis).
>
> The difference between the "carry-bit NCO" approach (or whatever we want to call it) and the PWM output (the final diagram, half black, half white) is clear to see.
>
> The important thing is the way that the black and white pixels are far more mixed up- e.g. the noise is of much higher frequency, and therefore much easier to filter out.
>
>
> On 11 Dec 2023, at 08:59, cheater cheater via Synth-diy <synth-diy at synth-diy.org> wrote:
>
> Thanks, sorry, I still don't understand this:
>
> > Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
>
> what do you mean by that?
>
> BTW, it's probably useful to send these emails to the list.
>
>
> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com> wrote:
>>
>> "carry-bit NCO" is how I summarized the approach Tom uses: output a pulse whenever the counter overflows.
>>
>> Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
>> y=0 -> row of all zeros (white)
>> y=256 -> row of all ones (black)
>> y=128 -> row of alternating ones and zeros
>>
>> The interesting parts are really:
>>   a) Overflow bit approach is _vastly_ better than PWM.
>>   b) Most microcontrollers have a timer/counter peripheral where you can implement this in hardware, having almost no s/w cost, and runnig around the uC's clock rate (several MHz).
>>   c) 1st order sigma delta converters are garbage: need a hefty oversampling rate and noise rises like a 45 degree line through the passband.
>>
>>
>>
>> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater <cheater00social at gmail.com> wrote:
>>>
>>>
>>>
>>> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz <dkantowitz at gmail.com> wrote:
>>>>
>>>> The carry-bit NCO technique is also equivalent to a 1-bit first order sigma delta DAC.
>>>
>>>
>>> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned before your email.
>>>
>>>>
>>>> Probably doesn't make it much easier to understand, but it does make the design conclusions from sigma delta usable.  Ex. noise shaping curves, required Over Sampling Rates vs ENOB, reconstruction filtering (see: https://en.wikipedia.org/wiki/Delta-sigma_modulation).
>>>>
>>>> To help myself visualize this, I plotted the output bit patterns for each input level.  Both modulation algorithms (1-bit carry NCO and SD-1) produced the same chart.
>>>>
>>>> DC level is y-axis, time is x-axis.
>>>
>>>
>>> I'm having trouble understanding these graphs. What's going on in them? "DC level is y-axis" doesn't seem to make sense in a plot that has multiple y values per one x value. What am I missing here?
>>>
>>>>
>>>> <image.png>
>>>> Repeated 4 times to help imagine the oversampling:
>>>> <image.png>
>>>>
>>>> For comparison basic PWM looks like:
>>>> <image.png>
>>>>
>>>> By looking across a horizontal line, you can easily see the carry-bit approach has a vast reduction in low frequency content compared to PWM.  That is, the digital signal 'noise' is being pushed into higher frequencies.  However, there's still plenty of repeating pattern in the NCO/SD-1
>>>>
>>>>
>>>> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>>
>>>>> Honestly, it's not. It's just that damn simple. The version I actually wrote was all hardware module set-up specific to the device, and basically nothing else, so wouldn't tell you anything. Turning it all into software loses a lot of the benefit, so doesn't make much sense, except to explain it.
>>>>>
>>>>> Play with some NCOs a bit, and then get them to make a single pulse when they wrap. And then - Bingo! You're there!
>>>>>
>>>>> If you thought something was missing, what exactly? Ask a more specific question and perhaps I can help fill in a blank. I well remember how weird this stuff seemed when I first met it, so I think I understand the position you're in now.
>>>>>
>>>>>
>>>>> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
>>>>> >
>>>>> > I don't get it. Most of the algorithm is missing.
>>>>> >
>>>>> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>> >>
>>>>> >>
>>>>> >>
>>>>> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
>>>>> >>
>>>>> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>> >>
>>>>> >>
>>>>> >>
>>>>> >>
>>>>> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>>>>> >>
>>>>> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
>>>>> >> describes), then it does indeed lock you into a lower sampling rate, and
>>>>> >> that's one reason I skipped describing *that* technique.  But PWM with
>>>>> >> bit-reversal seems not to be what you mean when you say PDM.
>>>>> >>
>>>>> >>
>>>>> >> That's not what I meant when I said PDM, certainly.
>>>>> >>
>>>>> >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>>>>> >>
>>>>> >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
>>>>> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
>>>>> >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>>>>> >>
>>>>> >> HTH,
>>>>> >> Tom
>>>>> >>
>>>>> >>
>>>>> >> I've read this a few times but I'm struggling to understand what's
>>>>> >> going on. Can someone type out an algorithm or something like that?
>>>>> >> Would appreciate it a lot. Thanks.
>>>>> >>
>>>>> >>
>>>>> >> Ok, it'd look something like this:
>>>>> >>
>>>>> >> phase: 16-bit variable (for example)
>>>>> >> freq: 16-bit variable (same as phase)
>>>>> >>
>>>>> >> So we do:
>>>>> >>
>>>>> >> // Increment phase accumulator
>>>>> >> phase = phase + freq
>>>>> >>
>>>>> >> // Did phase wraparound?
>>>>> >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
>>>>> >> // Ok, phase wrapped
>>>>> >> phase = phase % 65536
>>>>> >> // output a pulse a single clock in length
>>>>> >> <this is implementation dependent!>
>>>>> >> }
>>>>> >>
>>>>> >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
>>>>> >>
>>>>> >>
>>>>> >> There's a page about NCOs in general on my website:
>>>>> >>
>>>>> >> https://electricdruid.net/direct-digital-synthesis/
>>>>> >>
>>>>> >> HTH,
>>>>> >> Tom
>>>>> >>
>>>>> >>
>>>>>
>>>>>
>>>>> _______________________________________________
>>>>> Synth-diy mailing list
>>>>> Synth-diy at synth-diy.org
>>>>> http://synth-diy.org/mailman/listinfo/synth-diy
>>>>> Selling or trading? Use marketplace at synth-diy.org
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
>



From rburnett at richieburnett.co.uk  Mon Dec 11 11:08:24 2023
From: rburnett at richieburnett.co.uk (rburnett at richieburnett.co.uk)
Date: Mon, 11 Dec 2023 10:08:24 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-_N4+QHBmdSNuM1yCYakvCG6J5Pvpk5nWmUg9s6f8ZPiQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
 <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>
 <CAGn5V-_N4+QHBmdSNuM1yCYakvCG6J5Pvpk5nWmUg9s6f8ZPiQ@mail.gmail.com>
Message-ID: <1e9ee89dd9da525d5de996dc72f25f47@richieburnett.co.uk>

For each constant that you repeatedly add to the NCO you get a unique 
bit-pattern generated.  And the amount of 1's in one period of that bit 
pattern is proportional to the constant that you add into the NCO.  The 
funky pattern is a graphical representation of this...

Notice how the plot is lighter at the bottom and darker towards the top. 
  That is because the density of 1's and 0's changes as you move up the 
plot and the constant being added into the NCO is larger.  White pixels 
look like they represent 0's and black pixels represent 1's.  The bottom 
row is white right across, so that is a run of 256 zeros.  The top row 
is black right across, so that's a run of 256 ones.  And all of the rows 
in between have varying numbers of 0's and 1's roughly evenly 
distributed across the row.

Now if you look at the equivalent picture for PWM you'll see that all of 
the 0's (white pixels) and 1's (black pixels) are grouped together in 
each row.  That is because PWM goes high for the programmed pulse width 
then returns low for the remainder of the period.

Now I'm wondering what my "bit reversed PWM" would look like on one of 
these plots...?

-Richie,


On 2023-12-11 09:54, cheater cheater via Synth-diy wrote:
>> He's plotted the output from the algorithm as black and white pixels 
>> (the x axis) for each "DAC output value" (the y-axis).
> 
> ugh, still struggling. i don't know what that means. :S
> 
> On Mon, Dec 11, 2023 at 10:29?AM Tom Wiltshire <tom at electricdruid.net> 
> wrote:
>> 
>> He's plotted the output from the algorithm as black and white pixels 
>> (the x axis) for each "DAC output value" (the y-axis).
>> 
>> The difference between the "carry-bit NCO" approach (or whatever we 
>> want to call it) and the PWM output (the final diagram, half black, 
>> half white) is clear to see.
>> 
>> The important thing is the way that the black and white pixels are far 
>> more mixed up- e.g. the noise is of much higher frequency, and 
>> therefore much easier to filter out.
>> 
>> 
>> On 11 Dec 2023, at 08:59, cheater cheater via Synth-diy 
>> <synth-diy at synth-diy.org> wrote:
>> 
>> Thanks, sorry, I still don't understand this:
>> 
>> > Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
>> 
>> what do you mean by that?
>> 
>> BTW, it's probably useful to send these emails to the list.
>> 
>> 
>> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com> 
>> wrote:
>>> 
>>> "carry-bit NCO" is how I summarized the approach Tom uses: output a 
>>> pulse whenever the counter overflows.
>>> 
>>> Each horizontal row of the chart is the waveform generated for the 
>>> constant input on the y-axis.
>>> y=0 -> row of all zeros (white)
>>> y=256 -> row of all ones (black)
>>> y=128 -> row of alternating ones and zeros
>>> 
>>> The interesting parts are really:
>>>   a) Overflow bit approach is _vastly_ better than PWM.
>>>   b) Most microcontrollers have a timer/counter peripheral where you 
>>> can implement this in hardware, having almost no s/w cost, and runnig 
>>> around the uC's clock rate (several MHz).
>>>   c) 1st order sigma delta converters are garbage: need a hefty 
>>> oversampling rate and noise rises like a 45 degree line through the 
>>> passband.
>>> 
>>> 
>>> 
>>> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater 
>>> <cheater00social at gmail.com> wrote:
>>>> 
>>>> 
>>>> 
>>>> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz 
>>>> <dkantowitz at gmail.com> wrote:
>>>>> 
>>>>> The carry-bit NCO technique is also equivalent to a 1-bit first 
>>>>> order sigma delta DAC.
>>>> 
>>>> 
>>>> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned 
>>>> before your email.
>>>> 
>>>>> 
>>>>> Probably doesn't make it much easier to understand, but it does 
>>>>> make the design conclusions from sigma delta usable.  Ex. noise 
>>>>> shaping curves, required Over Sampling Rates vs ENOB, 
>>>>> reconstruction filtering (see: 
>>>>> https://en.wikipedia.org/wiki/Delta-sigma_modulation).
>>>>> 
>>>>> To help myself visualize this, I plotted the output bit patterns 
>>>>> for each input level.  Both modulation algorithms (1-bit carry NCO 
>>>>> and SD-1) produced the same chart.
>>>>> 
>>>>> DC level is y-axis, time is x-axis.
>>>> 
>>>> 
>>>> I'm having trouble understanding these graphs. What's going on in 
>>>> them? "DC level is y-axis" doesn't seem to make sense in a plot that 
>>>> has multiple y values per one x value. What am I missing here?
>>>> 
>>>>> 
>>>>> <image.png>
>>>>> Repeated 4 times to help imagine the oversampling:
>>>>> <image.png>
>>>>> 
>>>>> For comparison basic PWM looks like:
>>>>> <image.png>
>>>>> 
>>>>> By looking across a horizontal line, you can easily see the 
>>>>> carry-bit approach has a vast reduction in low frequency content 
>>>>> compared to PWM.  That is, the digital signal 'noise' is being 
>>>>> pushed into higher frequencies.  However, there's still plenty of 
>>>>> repeating pattern in the NCO/SD-1
>>>>> 
>>>>> 
>>>>> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire 
>>>>> <tom at electricdruid.net> wrote:
>>>>>> 
>>>>>> Honestly, it's not. It's just that damn simple. The version I 
>>>>>> actually wrote was all hardware module set-up specific to the 
>>>>>> device, and basically nothing else, so wouldn't tell you anything. 
>>>>>> Turning it all into software loses a lot of the benefit, so 
>>>>>> doesn't make much sense, except to explain it.
>>>>>> 
>>>>>> Play with some NCOs a bit, and then get them to make a single 
>>>>>> pulse when they wrap. And then - Bingo! You're there!
>>>>>> 
>>>>>> If you thought something was missing, what exactly? Ask a more 
>>>>>> specific question and perhaps I can help fill in a blank. I well 
>>>>>> remember how weird this stuff seemed when I first met it, so I 
>>>>>> think I understand the position you're in now.
>>>>>> 
>>>>>> 
>>>>>> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
>>>>>> >
>>>>>> > I don't get it. Most of the algorithm is missing.
>>>>>> >
>>>>>> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>>> >>
>>>>>> >>
>>>>>> >>
>>>>>> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
>>>>>> >>
>>>>>> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>>> >>
>>>>>> >>
>>>>>> >>
>>>>>> >>
>>>>>> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>>>>>> >>
>>>>>> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
>>>>>> >> describes), then it does indeed lock you into a lower sampling rate, and
>>>>>> >> that's one reason I skipped describing *that* technique.  But PWM with
>>>>>> >> bit-reversal seems not to be what you mean when you say PDM.
>>>>>> >>
>>>>>> >>
>>>>>> >> That's not what I meant when I said PDM, certainly.
>>>>>> >>
>>>>>> >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>>>>>> >>
>>>>>> >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
>>>>>> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
>>>>>> >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>>>>>> >>
>>>>>> >> HTH,
>>>>>> >> Tom
>>>>>> >>
>>>>>> >>
>>>>>> >> I've read this a few times but I'm struggling to understand what's
>>>>>> >> going on. Can someone type out an algorithm or something like that?
>>>>>> >> Would appreciate it a lot. Thanks.
>>>>>> >>
>>>>>> >>
>>>>>> >> Ok, it'd look something like this:
>>>>>> >>
>>>>>> >> phase: 16-bit variable (for example)
>>>>>> >> freq: 16-bit variable (same as phase)
>>>>>> >>
>>>>>> >> So we do:
>>>>>> >>
>>>>>> >> // Increment phase accumulator
>>>>>> >> phase = phase + freq
>>>>>> >>
>>>>>> >> // Did phase wraparound?
>>>>>> >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
>>>>>> >> // Ok, phase wrapped
>>>>>> >> phase = phase % 65536
>>>>>> >> // output a pulse a single clock in length
>>>>>> >> <this is implementation dependent!>
>>>>>> >> }
>>>>>> >>
>>>>>> >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
>>>>>> >>
>>>>>> >>
>>>>>> >> There's a page about NCOs in general on my website:
>>>>>> >>
>>>>>> >> https://electricdruid.net/direct-digital-synthesis/
>>>>>> >>
>>>>>> >> HTH,
>>>>>> >> Tom
>>>>>> >>
>>>>>> >>
>>>>>> 
>>>>>> 
>>>>>> _______________________________________________
>>>>>> Synth-diy mailing list
>>>>>> Synth-diy at synth-diy.org
>>>>>> http://synth-diy.org/mailman/listinfo/synth-diy
>>>>>> Selling or trading? Use marketplace at synth-diy.org
>> 
>> ________________________________________________________
>> This is the Synth-diy mailing list
>> Submit email to: Synth-diy at synth-diy.org
>> View archive at: https://synth-diy.org/pipermail/synth-diy/
>> Check your settings at: 
>> https://synth-diy.org/mailman/listinfo/synth-diy
>> Selling or trading? Use marketplace at synth-diy.org
>> 
>> 
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: 
> https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From ben at stuyts.nl  Mon Dec 11 13:46:13 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Mon, 11 Dec 2023 13:46:13 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
Message-ID: <6F433BE1-310E-4236-B6A5-C6854F98F45A@stuyts.nl>

David's message was held up for moderation because it was too big (1.6 MB). I?ve pushed it through manually.

Reminder: the max message size for this list is 1 MB, so next time please compress it.

Ben


> On 11 Dec 2023, at 09:59, cheater cheater via Synth-diy <synth-diy at synth-diy.org> wrote:
> [snip]
> BTW, it's probably useful to send these emails to the list.
> 
> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com <mailto:dkantowitz at gmail.com>> wrote:
> [snip]

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From modular at go2.pl  Mon Dec 11 16:11:02 2023
From: modular at go2.pl (Roman Sowa)
Date: Mon, 11 Dec 2023 16:11:02 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <F8B66559-1BCD-42D6-919B-B4DC247BDC1A@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <18b3f593-5948-70ef-ffdf-626210bba222@go2.pl>
 <CAP92RBVN=xtCvNvg-DLLQD662A6rrYgXen5ojGL=fywz=Dh_Hw@mail.gmail.com>
 <B96C894C-415C-4D7F-B042-4956FB86D54C@audiobanshee.com>
 <CAP92RBVvBcVAb-pAyyyUsnWnvMMZe58Kjsye9chndNMtdV6ePg@mail.gmail.com>
 <F8B66559-1BCD-42D6-919B-B4DC247BDC1A@audiobanshee.com>
Message-ID: <4baeccb6-9551-2e89-9901-3fe0197498de@go2.pl>

That's exactly what was done in some Oberheims, OBX or something, can't 
recall exactly. One big cap tied to a MUX, then a resistor and much 
smaller capacitor tied to that cap. So with slow update rate the 
stepping was smoothed out enough not to be heard as zipper noise. 
Envelopes and LFOs done this way, the synth is considered one of the 
best sounding classics.

Placing RC after the buffer sounds like cleaner idea, and since every CV 
output is hardwired to a node in the circuit with known and constant 
impedance, even high impedance of the RC filter will not matter at all, 
once it's considered as part of circuit's total input impedance.

Roman

W dniu 2023-12-10 o?20:36, brianw pisze:
> A passive RC link between the mux cap (a.k.a. S/H cap) before the buffer op-amp will drain the S/H storage cap. I'm super-paranoid about selecting op-amps with JFET inputs and tens of gigaohms of input impedance to avoid draining that S/H cap. Putting a passive RC filter between the cap and op-amp buffer would defeat that.
> 
> Wouldn't the same RC filter work equally well *after* the buffer op-amp?
> 
> p.s. After the op-amp is where I placed my single-pole low-pass. So I guess you've answered my question in respect to whether some folks consider single-pole to be enough.
> 
> Brian
> 
> 
> On Dec 10, 2023, at 3:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
>> brianw <brianw at audiobanshee.com> skrev:
>> On Dec 8, 2023, at 6:50 AM, Mattias Rickardsson <mr at analogue.org> wrote:
>>> Roman Sowa <modular at go2.pl> skrev:
>>>> OTOH I would love to see someone doing 100-outs MUX with single DAC
>>>> spitting 16-bit precision at 1Msps
>>>
>>> That's basically what we do since 2012.
>>> 16-bit 1MSPS DAC running at 0.96 MHz, multiplexing its output to 40 CV channels, each at 24kHz update rate (no zipper noise in the audio band).
>>> Works well, but I wouldn't want to try controlling that DAC/mux timing with a microprocessor, or build it on a single-sided board. :-)
>>
>> One question I have is, "How much reconstruction filtering is necessary?"
>>
>> It was enough with an extra RC link directly after the mux cap, before the buffer op-amp. Added cost: ~0.008 $ per CV channel.
>>
>> /mr
>>
> 
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From modular at go2.pl  Mon Dec 11 16:14:44 2023
From: modular at go2.pl (Roman Sowa)
Date: Mon, 11 Dec 2023 16:14:44 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
Message-ID: <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>

This is awesome! Such a simple trick helps to visualize it so quickly.
Testing different patterns to further minimize any repeatability seems 
like pleasant adventure now and doesn't even require any test equipment.

Roman

W dniu 2023-12-10 o?20:36, David Kantowitz via Synth-diy pisze:
> The carry-bit NCO technique is also equivalent?to a 1-bit first order 
> sigma delta DAC.? Probably doesn't make it much easier to understand, 
> but it does make the design conclusions from sigma delta usable.? Ex. 
> noise shaping curves, required Over Sampling Rates vs ENOB, 
> reconstruction filtering (see: 
> https://en.wikipedia.org/wiki/Delta-sigma_modulation 
> <https://en.wikipedia.org/wiki/Delta-sigma_modulation>).
> 
> To help myself visualize this, I plotted the output bit patterns for 
> each input level.? Both modulation algorithms (1-bit carry NCO and SD-1) 
> produced?the same chart.
> 
> DC level is y-axis, time is x-axis.
> image.png
> Repeated 4 times to help imagine the oversampling:
> image.png
> 
> For comparison basic PWM looks like:
> image.png
> 
> By looking across a horizontal line, you can easily?see the carry-bit 
> approach has a vast reduction in low frequency content compared to PWM.  
> That is, the digital signal 'noise' is being pushed into higher 
> frequencies.? However, there's still plenty of repeating pattern in the 
> NCO/SD-1
> 
> 
> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire <tom at electricdruid.net 
> <mailto:tom at electricdruid.net>> wrote:
> 
>     Honestly, it's not. It's just that damn simple. The version I
>     actually wrote was all hardware module set-up specific to the
>     device, and basically nothing else, so wouldn't tell you anything.
>     Turning it all into software loses a lot of the benefit, so doesn't
>     make much sense, except to explain it.
> 
>     Play with some NCOs a bit, and then get them to make a single pulse
>     when they wrap. And then - Bingo! You're there!
> 
>     If you thought something was missing, what exactly? Ask a more
>     specific question and perhaps I can help fill in a blank. I well
>     remember how weird this stuff seemed when I first met it, so I think
>     I understand the position you're in now.
> 
> 
>      > On 8 Dec 2023, at 21:18, cheater cheater
>     <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
>      >
>      > I don't get it. Most of the algorithm is missing.
>      >
>      > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire
>     <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
>      >>
>      >>
>      >>
>      >> On 8 Dec 2023, at 20:30, cheater cheater
>     <cheater00social at gmail.com <mailto:cheater00social at gmail.com>> wrote:
>      >>
>      >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire
>     <tom at electricdruid.net <mailto:tom at electricdruid.net>> wrote:
>      >>
>      >>
>      >>
>      >>
>      >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy
>     <synth-diy at synth-diy.org <mailto:synth-diy at synth-diy.org>> wrote:
>      >>
>      >> If PDM means PWM with bit-reversal before the comparison (such
>     as Richie
>      >> describes), then it does indeed lock you into a lower sampling
>     rate, and
>      >> that's one reason I skipped describing *that* technique.? But
>     PWM with
>      >> bit-reversal seems not to be what you mean when you say PDM.
>      >>
>      >>
>      >> That's not what I meant when I said PDM, certainly.
>      >>
>      >> The way I generated it is using an NCO. The NCO generates a
>     single-shot output pulse everytime the phase accumulator wraps.
>      >>
>      >> Now consider what happens with a simple 8-bit NCO. If our
>     frequency increment is 2, for example, we get a single output pulse
>     every 128 clocks, or 2 pulses per 256 clocks. Notice that they will
>     be nicely spaced apart, not next to each other like PWM. The output
>     frequency would be (clock frequency / 128) in this situation.
>      >> If the increment is 8, we get a output pulse every 32 clocks, 8
>     pulses per 256 clocks, and again, they're nicely spaced out. The
>     output frequency is now up to (clock /32) so there's been a big
>     improvement, just by getting away from those extreme values a little
>     bit.
>      >> As the increment climbs, the accumulator wraps more and more
>     often. At freq=128, every other clock is an output and we reach our
>     maximum output frequency of (clock/2). As the increment goes above
>     half, we start staying high for more than a single pulse, and the
>     waveform effectively turns the other way up and we get a mirror
>     image of the effect we've seen from 0-128.
>      >>
>      >> HTH,
>      >> Tom
>      >>
>      >>
>      >> I've read this a few times but I'm struggling to understand what's
>      >> going on. Can someone type out an algorithm or something like that?
>      >> Would appreciate it a lot. Thanks.
>      >>
>      >>
>      >> Ok, it'd look something like this:
>      >>
>      >> phase: 16-bit variable (for example)
>      >> freq: 16-bit variable (same as phase)
>      >>
>      >> So we do:
>      >>
>      >> // Increment phase accumulator
>      >> phase = phase + freq
>      >>
>      >> // Did phase wraparound?
>      >> If (phase>65535) { // There are probably better ways to do this
>     test, if it's even required.
>      >> // Ok, phase wrapped
>      >> phase = phase % 65536
>      >> // output a pulse a single clock in length
>      >> <this is implementation dependent!>
>      >> }
>      >>
>      >> All you need to do is run this code at a fast clock rate and
>     you're off. Of course, the better way is if you can hand some of
>     this overhead to hardware, and some modern uPs include NCOs as a
>     peripheral and can be set up for this "single shot pulse output"
>     mode, which means that the while thing boils down to simply updating
>     the "freq" frequency increment variable with your current output.
>     It's dead simple.
>      >>
>      >>
>      >> There's a page about NCOs in general on my website:
>      >>
>      >> https://electricdruid.net/direct-digital-synthesis/
>     <https://electricdruid.net/direct-digital-synthesis/>
>      >>
>      >> HTH,
>      >> Tom
>      >>
>      >>
> 
> 
>     _______________________________________________
>     Synth-diy mailing list
>     Synth-diy at synth-diy.org <mailto:Synth-diy at synth-diy.org>
>     http://synth-diy.org/mailman/listinfo/synth-diy
>     <http://synth-diy.org/mailman/listinfo/synth-diy>
>     Selling or trading? Use marketplace at synth-diy.org
>     <mailto:marketplace at synth-diy.org>
> 
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From lijon at kymatica.com  Mon Dec 11 16:49:45 2023
From: lijon at kymatica.com (Jonatan Liljedahl)
Date: Mon, 11 Dec 2023 16:49:45 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
Message-ID: <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>

I did a similar plot when I was experimenting with
sigma-delta/noise-shaping output from an STM32, but in ASCII :)
There's one trick where an SPI peripheral is used for "high quality"
audio PDM output, but I never was able to get any usable performance
from it. I even got better results just using 8 bit PWM but with
sigma-delta noise shaping. (But I settled on using the built-in 12 bit
DAC instead)

Cheers
/Jonatan

On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl> wrote:
>
> This is awesome! Such a simple trick helps to visualize it so quickly.
> Testing different patterns to further minimize any repeatability seems
> like pleasant adventure now and doesn't even require any test equipment.
>
> Roman

-- 
/Jonatan
http://kymatica.com
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From mbryant at futurehorizons.com  Mon Dec 11 17:00:11 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Mon, 11 Dec 2023 16:00:11 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
Message-ID: <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Using SPI requires continuous mode which I'm not sure most STM32s support.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Jonatan Liljedahl <lijon at kymatica.com>
Sent: 11 December 2023 15:49
To: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

I did a similar plot when I was experimenting with
sigma-delta/noise-shaping output from an STM32, but in ASCII :)
There's one trick where an SPI peripheral is used for "high quality"
audio PDM output, but I never was able to get any usable performance
from it. I even got better results just using 8 bit PWM but with
sigma-delta noise shaping. (But I settled on using the built-in 12 bit
DAC instead)

Cheers
/Jonatan

On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl> wrote:
>
> This is awesome! Such a simple trick helps to visualize it so quickly.
> Testing different patterns to further minimize any repeatability seems
> like pleasant adventure now and doesn't even require any test equipment.
>
> Roman

--
/Jonatan
http://kymatica.com
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From rburnett at richieburnett.co.uk  Mon Dec 11 17:03:05 2023
From: rburnett at richieburnett.co.uk (rburnett at richieburnett.co.uk)
Date: Mon, 11 Dec 2023 16:03:05 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
Message-ID: <ffee2646b333892a96644395861e6f66@richieburnett.co.uk>

Very festive looking! ;-)

-Richie,



On 2023-12-11 15:49, Jonatan Liljedahl wrote:
> I did a similar plot when I was experimenting with
> sigma-delta/noise-shaping output from an STM32, but in ASCII :)
> There's one trick where an SPI peripheral is used for "high quality"
> audio PDM output, but I never was able to get any usable performance
> from it. I even got better results just using 8 bit PWM but with
> sigma-delta noise shaping. (But I settled on using the built-in 12 bit
> DAC instead)
> 
> Cheers
> /Jonatan
> 
> On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl> wrote:
>> 
>> This is awesome! Such a simple trick helps to visualize it so quickly.
>> Testing different patterns to further minimize any repeatability seems
>> like pleasant adventure now and doesn't even require any test 
>> equipment.
>> 
>> Roman
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: 
> https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From lijon at kymatica.com  Mon Dec 11 17:47:56 2023
From: lijon at kymatica.com (Jonatan Liljedahl)
Date: Mon, 11 Dec 2023 17:47:56 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CALfiFhBb01=UqF516VQ-fJ8P_Ymua=CYJb=RmeZE1F3MgVuVHw@mail.gmail.com>

Maybe that was the problem then! What exactly is continuous mode? No gaps
between words?

/Jonatan
http://kymatica.com


m?n 11 dec. 2023 kl. 17:00 skrev Mike Bryant <mbryant at futurehorizons.com>:

> Using SPI requires continuous mode which I'm not sure most STM32s support.
>
> ------------------------------
> *From:* Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Jonatan
> Liljedahl <lijon at kymatica.com>
> *Sent:* 11 December 2023 15:49
> *To:* SDIY <synth-diy at synth-diy.org>
>
> *Subject:* Re: [sdiy] Generating a large number of CV outputs
>
> I did a similar plot when I was experimenting with
> sigma-delta/noise-shaping output from an STM32, but in ASCII :)
> There's one trick where an SPI peripheral is used for "high quality"
> audio PDM output, but I never was able to get any usable performance
> from it. I even got better results just using 8 bit PWM but with
> sigma-delta noise shaping. (But I settled on using the built-in 12 bit
> DAC instead)
>
> Cheers
> /Jonatan
>
> On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl> wrote:
> >
> > This is awesome! Such a simple trick helps to visualize it so quickly.
> > Testing different patterns to further minimize any repeatability seems
> > like pleasant adventure now and doesn't even require any test equipment.
> >
> > Roman
>
> --
> /Jonatan
> http://kymatica.com
>
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From mbryant at futurehorizons.com  Mon Dec 11 17:51:33 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Mon, 11 Dec 2023 16:51:33 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CALfiFhBb01=UqF516VQ-fJ8P_Ymua=CYJb=RmeZE1F3MgVuVHw@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CALfiFhBb01=UqF516VQ-fJ8P_Ymua=CYJb=RmeZE1F3MgVuVHw@mail.gmail.com>
Message-ID: <CWLP265MB7132A3BAF1E91A127A4C56EDDB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

Yes.  The original SPI 'spec' stated a maximum number of words per transfer so that everybody supported that, but some MCUs just extend it to infinity subject to DMA and memory limits.

________________________________
From: Jonatan Liljedahl <lijon at kymatica.com>
Sent: 11 December 2023 16:47
To: Mike Bryant <mbryant at futurehorizons.com>
Cc: SDIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

Maybe that was the problem then! What exactly is continuous mode? No gaps between words?

/Jonatan
http://kymatica.com


m?n 11 dec. 2023 kl. 17:00 skrev Mike Bryant <mbryant at futurehorizons.com<mailto:mbryant at futurehorizons.com>>:
Using SPI requires continuous mode which I'm not sure most STM32s support.

________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org<mailto:synth-diy-bounces at synth-diy.org>> on behalf of Jonatan Liljedahl <lijon at kymatica.com<mailto:lijon at kymatica.com>>
Sent: 11 December 2023 15:49
To: SDIY <synth-diy at synth-diy.org<mailto:synth-diy at synth-diy.org>>

Subject: Re: [sdiy] Generating a large number of CV outputs

I did a similar plot when I was experimenting with
sigma-delta/noise-shaping output from an STM32, but in ASCII :)
There's one trick where an SPI peripheral is used for "high quality"
audio PDM output, but I never was able to get any usable performance
from it. I even got better results just using 8 bit PWM but with
sigma-delta noise shaping. (But I settled on using the built-in 12 bit
DAC instead)

Cheers
/Jonatan

On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl<mailto:modular at go2.pl>> wrote:
>
> This is awesome! Such a simple trick helps to visualize it so quickly.
> Testing different patterns to further minimize any repeatability seems
> like pleasant adventure now and doesn't even require any test equipment.
>
> Roman

--
/Jonatan
http://kymatica.com
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From vladoman at gmail.com  Mon Dec 11 18:04:44 2023
From: vladoman at gmail.com (Vladimir Pantelic)
Date: Mon, 11 Dec 2023 18:04:44 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>

On 12/11/23 17:00, Mike Bryant wrote:
> Using SPI requires continuous mode which I'm not sure most STM32s support.

should be no isssue when doing circular DMA (and the source memory can keep up)




From dkantowitz at gmail.com  Mon Dec 11 18:38:59 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Mon, 11 Dec 2023 09:38:59 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <1e9ee89dd9da525d5de996dc72f25f47@richieburnett.co.uk>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
 <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>
 <CAGn5V-_N4+QHBmdSNuM1yCYakvCG6J5Pvpk5nWmUg9s6f8ZPiQ@mail.gmail.com>
 <1e9ee89dd9da525d5de996dc72f25f47@richieburnett.co.uk>
Message-ID: <CAEfLrHHOe2-bZrT8hrbJn2x=3wbmZmjhO0sY_EM0FjLcD5Rw2A@mail.gmail.com>

Richie,
Thanks for explaining more clearly.  Seems my visualization skills are
better than my writing skills.

I saw mention of the "bit reversed PWM", but couldn't find the email
describing it.
Can you sketch the idea? I'll try making a chart of that too.
-David K.

On Mon, Dec 11, 2023 at 2:10?AM <rburnett at richieburnett.co.uk> wrote:

> For each constant that you repeatedly add to the NCO you get a unique
> bit-pattern generated.  And the amount of 1's in one period of that bit
> pattern is proportional to the constant that you add into the NCO.  The
> funky pattern is a graphical representation of this...
>
> Notice how the plot is lighter at the bottom and darker towards the top.
>   That is because the density of 1's and 0's changes as you move up the
> plot and the constant being added into the NCO is larger.  White pixels
> look like they represent 0's and black pixels represent 1's.  The bottom
> row is white right across, so that is a run of 256 zeros.  The top row
> is black right across, so that's a run of 256 ones.  And all of the rows
> in between have varying numbers of 0's and 1's roughly evenly
> distributed across the row.
>
> Now if you look at the equivalent picture for PWM you'll see that all of
> the 0's (white pixels) and 1's (black pixels) are grouped together in
> each row.  That is because PWM goes high for the programmed pulse width
> then returns low for the remainder of the period.
>
> Now I'm wondering what my "bit reversed PWM" would look like on one of
> these plots...?
>
> -Richie,
>
>
> On 2023-12-11 09:54, cheater cheater via Synth-diy wrote:
> >> He's plotted the output from the algorithm as black and white pixels
> >> (the x axis) for each "DAC output value" (the y-axis).
> >
> > ugh, still struggling. i don't know what that means. :S
> >
> > On Mon, Dec 11, 2023 at 10:29?AM Tom Wiltshire <tom at electricdruid.net>
> > wrote:
> >>
> >> He's plotted the output from the algorithm as black and white pixels
> >> (the x axis) for each "DAC output value" (the y-axis).
> >>
> >> The difference between the "carry-bit NCO" approach (or whatever we
> >> want to call it) and the PWM output (the final diagram, half black,
> >> half white) is clear to see.
> >>
> >> The important thing is the way that the black and white pixels are far
> >> more mixed up- e.g. the noise is of much higher frequency, and
> >> therefore much easier to filter out.
> >>
> >>
> >> On 11 Dec 2023, at 08:59, cheater cheater via Synth-diy
> >> <synth-diy at synth-diy.org> wrote:
> >>
> >> Thanks, sorry, I still don't understand this:
> >>
> >> > Each horizontal row of the chart is the waveform generated for the
> constant input on the y-axis.
> >>
> >> what do you mean by that?
> >>
> >> BTW, it's probably useful to send these emails to the list.
> >>
> >>
> >> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com>
> >> wrote:
> >>>
> >>> "carry-bit NCO" is how I summarized the approach Tom uses: output a
> >>> pulse whenever the counter overflows.
> >>>
> >>> Each horizontal row of the chart is the waveform generated for the
> >>> constant input on the y-axis.
> >>> y=0 -> row of all zeros (white)
> >>> y=256 -> row of all ones (black)
> >>> y=128 -> row of alternating ones and zeros
> >>>
> >>> The interesting parts are really:
> >>>   a) Overflow bit approach is _vastly_ better than PWM.
> >>>   b) Most microcontrollers have a timer/counter peripheral where you
> >>> can implement this in hardware, having almost no s/w cost, and runnig
> >>> around the uC's clock rate (several MHz).
> >>>   c) 1st order sigma delta converters are garbage: need a hefty
> >>> oversampling rate and noise rises like a 45 degree line through the
> >>> passband.
> >>>
> >>>
> >>>
> >>> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater
> >>> <cheater00social at gmail.com> wrote:
> >>>>
> >>>>
> >>>>
> >>>> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz
> >>>> <dkantowitz at gmail.com> wrote:
> >>>>>
> >>>>> The carry-bit NCO technique is also equivalent to a 1-bit first
> >>>>> order sigma delta DAC.
> >>>>
> >>>>
> >>>> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned
> >>>> before your email.
> >>>>
> >>>>>
> >>>>> Probably doesn't make it much easier to understand, but it does
> >>>>> make the design conclusions from sigma delta usable.  Ex. noise
> >>>>> shaping curves, required Over Sampling Rates vs ENOB,
> >>>>> reconstruction filtering (see:
> >>>>> https://en.wikipedia.org/wiki/Delta-sigma_modulation).
> >>>>>
> >>>>> To help myself visualize this, I plotted the output bit patterns
> >>>>> for each input level.  Both modulation algorithms (1-bit carry NCO
> >>>>> and SD-1) produced the same chart.
> >>>>>
> >>>>> DC level is y-axis, time is x-axis.
> >>>>
> >>>>
> >>>> I'm having trouble understanding these graphs. What's going on in
> >>>> them? "DC level is y-axis" doesn't seem to make sense in a plot that
> >>>> has multiple y values per one x value. What am I missing here?
> >>>>
> >>>>>
> >>>>> <image.png>
> >>>>> Repeated 4 times to help imagine the oversampling:
> >>>>> <image.png>
> >>>>>
> >>>>> For comparison basic PWM looks like:
> >>>>> <image.png>
> >>>>>
> >>>>> By looking across a horizontal line, you can easily see the
> >>>>> carry-bit approach has a vast reduction in low frequency content
> >>>>> compared to PWM.  That is, the digital signal 'noise' is being
> >>>>> pushed into higher frequencies.  However, there's still plenty of
> >>>>> repeating pattern in the NCO/SD-1
> >>>>>
> >>>>>
> >>>>> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire
> >>>>> <tom at electricdruid.net> wrote:
> >>>>>>
> >>>>>> Honestly, it's not. It's just that damn simple. The version I
> >>>>>> actually wrote was all hardware module set-up specific to the
> >>>>>> device, and basically nothing else, so wouldn't tell you anything.
> >>>>>> Turning it all into software loses a lot of the benefit, so
> >>>>>> doesn't make much sense, except to explain it.
> >>>>>>
> >>>>>> Play with some NCOs a bit, and then get them to make a single
> >>>>>> pulse when they wrap. And then - Bingo! You're there!
> >>>>>>
> >>>>>> If you thought something was missing, what exactly? Ask a more
> >>>>>> specific question and perhaps I can help fill in a blank. I well
> >>>>>> remember how weird this stuff seemed when I first met it, so I
> >>>>>> think I understand the position you're in now.
> >>>>>>
> >>>>>>
> >>>>>> > On 8 Dec 2023, at 21:18, cheater cheater <
> cheater00social at gmail.com> wrote:
> >>>>>> >
> >>>>>> > I don't get it. Most of the algorithm is missing.
> >>>>>> >
> >>>>>> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <
> tom at electricdruid.net> wrote:
> >>>>>> >>
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> On 8 Dec 2023, at 20:30, cheater cheater <
> cheater00social at gmail.com> wrote:
> >>>>>> >>
> >>>>>> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <
> tom at electricdruid.net> wrote:
> >>>>>> >>
> >>>>>> >>
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <
> synth-diy at synth-diy.org> wrote:
> >>>>>> >>
> >>>>>> >> If PDM means PWM with bit-reversal before the comparison (such
> as Richie
> >>>>>> >> describes), then it does indeed lock you into a lower sampling
> rate, and
> >>>>>> >> that's one reason I skipped describing *that* technique.  But
> PWM with
> >>>>>> >> bit-reversal seems not to be what you mean when you say PDM.
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> That's not what I meant when I said PDM, certainly.
> >>>>>> >>
> >>>>>> >> The way I generated it is using an NCO. The NCO generates a
> single-shot output pulse everytime the phase accumulator wraps.
> >>>>>> >>
> >>>>>> >> Now consider what happens with a simple 8-bit NCO. If our
> frequency increment is 2, for example, we get a single output pulse every
> 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely
> spaced apart, not next to each other like PWM. The output frequency would
> be (clock frequency / 128) in this situation.
> >>>>>> >> If the increment is 8, we get a output pulse every 32 clocks, 8
> pulses per 256 clocks, and again, they're nicely spaced out. The output
> frequency is now up to (clock /32) so there's been a big improvement, just
> by getting away from those extreme values a little bit.
> >>>>>> >> As the increment climbs, the accumulator wraps more and more
> often. At freq=128, every other clock is an output and we reach our maximum
> output frequency of (clock/2). As the increment goes above half, we start
> staying high for more than a single pulse, and the waveform effectively
> turns the other way up and we get a mirror image of the effect we've seen
> from 0-128.
> >>>>>> >>
> >>>>>> >> HTH,
> >>>>>> >> Tom
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> I've read this a few times but I'm struggling to understand
> what's
> >>>>>> >> going on. Can someone type out an algorithm or something like
> that?
> >>>>>> >> Would appreciate it a lot. Thanks.
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> Ok, it'd look something like this:
> >>>>>> >>
> >>>>>> >> phase: 16-bit variable (for example)
> >>>>>> >> freq: 16-bit variable (same as phase)
> >>>>>> >>
> >>>>>> >> So we do:
> >>>>>> >>
> >>>>>> >> // Increment phase accumulator
> >>>>>> >> phase = phase + freq
> >>>>>> >>
> >>>>>> >> // Did phase wraparound?
> >>>>>> >> If (phase>65535) { // There are probably better ways to do this
> test, if it's even required.
> >>>>>> >> // Ok, phase wrapped
> >>>>>> >> phase = phase % 65536
> >>>>>> >> // output a pulse a single clock in length
> >>>>>> >> <this is implementation dependent!>
> >>>>>> >> }
> >>>>>> >>
> >>>>>> >> All you need to do is run this code at a fast clock rate and
> you're off. Of course, the better way is if you can hand some of this
> overhead to hardware, and some modern uPs include NCOs as a peripheral and
> can be set up for this "single shot pulse output" mode, which means that
> the while thing boils down to simply updating the "freq" frequency
> increment variable with your current output. It's dead simple.
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> There's a page about NCOs in general on my website:
> >>>>>> >>
> >>>>>> >> https://electricdruid.net/direct-digital-synthesis/
> >>>>>> >>
> >>>>>> >> HTH,
> >>>>>> >> Tom
> >>>>>> >>
> >>>>>> >>
> >>>>>>
> >>>>>>
> >>>>>> _______________________________________________
> >>>>>> Synth-diy mailing list
> >>>>>> Synth-diy at synth-diy.org
> >>>>>> http://synth-diy.org/mailman/listinfo/synth-diy
> >>>>>> Selling or trading? Use marketplace at synth-diy.org
> >>
> >> ________________________________________________________
> >> This is the Synth-diy mailing list
> >> Submit email to: Synth-diy at synth-diy.org
> >> View archive at: https://synth-diy.org/pipermail/synth-diy/
> >> Check your settings at:
> >> https://synth-diy.org/mailman/listinfo/synth-diy
> >> Selling or trading? Use marketplace at synth-diy.org
> >>
> >>
> >
> > ________________________________________________________
> > This is the Synth-diy mailing list
> > Submit email to: Synth-diy at synth-diy.org
> > View archive at: https://synth-diy.org/pipermail/synth-diy/
> > Check your settings at:
> > https://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From cheater00social at gmail.com  Tue Dec 12 02:47:42 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Tue, 12 Dec 2023 02:47:42 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <1e9ee89dd9da525d5de996dc72f25f47@richieburnett.co.uk>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
 <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>
 <CAGn5V-_N4+QHBmdSNuM1yCYakvCG6J5Pvpk5nWmUg9s6f8ZPiQ@mail.gmail.com>
 <1e9ee89dd9da525d5de996dc72f25f47@richieburnett.co.uk>
Message-ID: <CAGn5V--O=3qpqSHgEKfme8SMZjaJ0vgT6Upkf2tTJFsJWajo3g@mail.gmail.com>

> For each constant that you repeatedly add to the NCO you get a unique bit-pattern generated

how is this bit pattern generated?

On Mon, Dec 11, 2023 at 11:08?AM <rburnett at richieburnett.co.uk> wrote:
>
> For each constant that you repeatedly add to the NCO you get a unique
> bit-pattern generated.  And the amount of 1's in one period of that bit
> pattern is proportional to the constant that you add into the NCO.  The
> funky pattern is a graphical representation of this...
>
> Notice how the plot is lighter at the bottom and darker towards the top.
>   That is because the density of 1's and 0's changes as you move up the
> plot and the constant being added into the NCO is larger.  White pixels
> look like they represent 0's and black pixels represent 1's.  The bottom
> row is white right across, so that is a run of 256 zeros.  The top row
> is black right across, so that's a run of 256 ones.  And all of the rows
> in between have varying numbers of 0's and 1's roughly evenly
> distributed across the row.
>
> Now if you look at the equivalent picture for PWM you'll see that all of
> the 0's (white pixels) and 1's (black pixels) are grouped together in
> each row.  That is because PWM goes high for the programmed pulse width
> then returns low for the remainder of the period.
>
> Now I'm wondering what my "bit reversed PWM" would look like on one of
> these plots...?
>
> -Richie,
>
>
> On 2023-12-11 09:54, cheater cheater via Synth-diy wrote:
> >> He's plotted the output from the algorithm as black and white pixels
> >> (the x axis) for each "DAC output value" (the y-axis).
> >
> > ugh, still struggling. i don't know what that means. :S
> >
> > On Mon, Dec 11, 2023 at 10:29?AM Tom Wiltshire <tom at electricdruid.net>
> > wrote:
> >>
> >> He's plotted the output from the algorithm as black and white pixels
> >> (the x axis) for each "DAC output value" (the y-axis).
> >>
> >> The difference between the "carry-bit NCO" approach (or whatever we
> >> want to call it) and the PWM output (the final diagram, half black,
> >> half white) is clear to see.
> >>
> >> The important thing is the way that the black and white pixels are far
> >> more mixed up- e.g. the noise is of much higher frequency, and
> >> therefore much easier to filter out.
> >>
> >>
> >> On 11 Dec 2023, at 08:59, cheater cheater via Synth-diy
> >> <synth-diy at synth-diy.org> wrote:
> >>
> >> Thanks, sorry, I still don't understand this:
> >>
> >> > Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
> >>
> >> what do you mean by that?
> >>
> >> BTW, it's probably useful to send these emails to the list.
> >>
> >>
> >> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com>
> >> wrote:
> >>>
> >>> "carry-bit NCO" is how I summarized the approach Tom uses: output a
> >>> pulse whenever the counter overflows.
> >>>
> >>> Each horizontal row of the chart is the waveform generated for the
> >>> constant input on the y-axis.
> >>> y=0 -> row of all zeros (white)
> >>> y=256 -> row of all ones (black)
> >>> y=128 -> row of alternating ones and zeros
> >>>
> >>> The interesting parts are really:
> >>>   a) Overflow bit approach is _vastly_ better than PWM.
> >>>   b) Most microcontrollers have a timer/counter peripheral where you
> >>> can implement this in hardware, having almost no s/w cost, and runnig
> >>> around the uC's clock rate (several MHz).
> >>>   c) 1st order sigma delta converters are garbage: need a hefty
> >>> oversampling rate and noise rises like a 45 degree line through the
> >>> passband.
> >>>
> >>>
> >>>
> >>> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater
> >>> <cheater00social at gmail.com> wrote:
> >>>>
> >>>>
> >>>>
> >>>> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz
> >>>> <dkantowitz at gmail.com> wrote:
> >>>>>
> >>>>> The carry-bit NCO technique is also equivalent to a 1-bit first
> >>>>> order sigma delta DAC.
> >>>>
> >>>>
> >>>> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned
> >>>> before your email.
> >>>>
> >>>>>
> >>>>> Probably doesn't make it much easier to understand, but it does
> >>>>> make the design conclusions from sigma delta usable.  Ex. noise
> >>>>> shaping curves, required Over Sampling Rates vs ENOB,
> >>>>> reconstruction filtering (see:
> >>>>> https://en.wikipedia.org/wiki/Delta-sigma_modulation).
> >>>>>
> >>>>> To help myself visualize this, I plotted the output bit patterns
> >>>>> for each input level.  Both modulation algorithms (1-bit carry NCO
> >>>>> and SD-1) produced the same chart.
> >>>>>
> >>>>> DC level is y-axis, time is x-axis.
> >>>>
> >>>>
> >>>> I'm having trouble understanding these graphs. What's going on in
> >>>> them? "DC level is y-axis" doesn't seem to make sense in a plot that
> >>>> has multiple y values per one x value. What am I missing here?
> >>>>
> >>>>>
> >>>>> <image.png>
> >>>>> Repeated 4 times to help imagine the oversampling:
> >>>>> <image.png>
> >>>>>
> >>>>> For comparison basic PWM looks like:
> >>>>> <image.png>
> >>>>>
> >>>>> By looking across a horizontal line, you can easily see the
> >>>>> carry-bit approach has a vast reduction in low frequency content
> >>>>> compared to PWM.  That is, the digital signal 'noise' is being
> >>>>> pushed into higher frequencies.  However, there's still plenty of
> >>>>> repeating pattern in the NCO/SD-1
> >>>>>
> >>>>>
> >>>>> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire
> >>>>> <tom at electricdruid.net> wrote:
> >>>>>>
> >>>>>> Honestly, it's not. It's just that damn simple. The version I
> >>>>>> actually wrote was all hardware module set-up specific to the
> >>>>>> device, and basically nothing else, so wouldn't tell you anything.
> >>>>>> Turning it all into software loses a lot of the benefit, so
> >>>>>> doesn't make much sense, except to explain it.
> >>>>>>
> >>>>>> Play with some NCOs a bit, and then get them to make a single
> >>>>>> pulse when they wrap. And then - Bingo! You're there!
> >>>>>>
> >>>>>> If you thought something was missing, what exactly? Ask a more
> >>>>>> specific question and perhaps I can help fill in a blank. I well
> >>>>>> remember how weird this stuff seemed when I first met it, so I
> >>>>>> think I understand the position you're in now.
> >>>>>>
> >>>>>>
> >>>>>> > On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
> >>>>>> >
> >>>>>> > I don't get it. Most of the algorithm is missing.
> >>>>>> >
> >>>>>> > On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> >>>>>> >>
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
> >>>>>> >>
> >>>>>> >> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
> >>>>>> >>
> >>>>>> >>
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
> >>>>>> >>
> >>>>>> >> If PDM means PWM with bit-reversal before the comparison (such as Richie
> >>>>>> >> describes), then it does indeed lock you into a lower sampling rate, and
> >>>>>> >> that's one reason I skipped describing *that* technique.  But PWM with
> >>>>>> >> bit-reversal seems not to be what you mean when you say PDM.
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> That's not what I meant when I said PDM, certainly.
> >>>>>> >>
> >>>>>> >> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
> >>>>>> >>
> >>>>>> >> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
> >>>>>> >> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
> >>>>>> >> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
> >>>>>> >>
> >>>>>> >> HTH,
> >>>>>> >> Tom
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> I've read this a few times but I'm struggling to understand what's
> >>>>>> >> going on. Can someone type out an algorithm or something like that?
> >>>>>> >> Would appreciate it a lot. Thanks.
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> Ok, it'd look something like this:
> >>>>>> >>
> >>>>>> >> phase: 16-bit variable (for example)
> >>>>>> >> freq: 16-bit variable (same as phase)
> >>>>>> >>
> >>>>>> >> So we do:
> >>>>>> >>
> >>>>>> >> // Increment phase accumulator
> >>>>>> >> phase = phase + freq
> >>>>>> >>
> >>>>>> >> // Did phase wraparound?
> >>>>>> >> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
> >>>>>> >> // Ok, phase wrapped
> >>>>>> >> phase = phase % 65536
> >>>>>> >> // output a pulse a single clock in length
> >>>>>> >> <this is implementation dependent!>
> >>>>>> >> }
> >>>>>> >>
> >>>>>> >> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
> >>>>>> >>
> >>>>>> >>
> >>>>>> >> There's a page about NCOs in general on my website:
> >>>>>> >>
> >>>>>> >> https://electricdruid.net/direct-digital-synthesis/
> >>>>>> >>
> >>>>>> >> HTH,
> >>>>>> >> Tom
> >>>>>> >>
> >>>>>> >>
> >>>>>>
> >>>>>>
> >>>>>> _______________________________________________
> >>>>>> Synth-diy mailing list
> >>>>>> Synth-diy at synth-diy.org
> >>>>>> http://synth-diy.org/mailman/listinfo/synth-diy
> >>>>>> Selling or trading? Use marketplace at synth-diy.org
> >>
> >> ________________________________________________________
> >> This is the Synth-diy mailing list
> >> Submit email to: Synth-diy at synth-diy.org
> >> View archive at: https://synth-diy.org/pipermail/synth-diy/
> >> Check your settings at:
> >> https://synth-diy.org/mailman/listinfo/synth-diy
> >> Selling or trading? Use marketplace at synth-diy.org
> >>
> >>
> >
> > ________________________________________________________
> > This is the Synth-diy mailing list
> > Submit email to: Synth-diy at synth-diy.org
> > View archive at: https://synth-diy.org/pipermail/synth-diy/
> > Check your settings at:
> > https://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org



From brianw at audiobanshee.com  Tue Dec 12 03:51:12 2023
From: brianw at audiobanshee.com (brianw)
Date: Mon, 11 Dec 2023 18:51:12 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAGn5V--O=3qpqSHgEKfme8SMZjaJ0vgT6Upkf2tTJFsJWajo3g@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <CAGn5V--H=giAACicvu2XGhiROnDd3feftwZWr0KH6L8Q=jqhkA@mail.gmail.com>
 <CAEfLrHFE5-eF0W=rwH4E9bsy_gbcgyrReGVCog7S-jHAsO=psw@mail.gmail.com>
 <CAGn5V-90hLhRGWWvkQ9n_rmFG_FNFsm95ds_utQhGc2fV2tBzA@mail.gmail.com>
 <CE5CDF86-90BC-4624-813C-81ADECCA31A8@electricdruid.net>
 <CAGn5V-_N4+QHBmdSNuM1yCYakvCG6J5Pvpk5nWmUg9s6f8ZPiQ@mail.gmail.com>
 <1e9ee89dd9da525d5de996dc72f25f47@richieburnett.co.uk>
 <CAGn5V--O=3qpqSHgEKfme8SMZjaJ0vgT6Upkf2tTJFsJWajo3g@mail.gmail.com>
Message-ID: <1DA76E19-92A2-4445-B3A0-F082782B8C2D@audiobanshee.com>

A Numerically Controlled Oscillator is generated by a counter (phase accumulator) and can output a square, ramp, or - using the ramp as a memory lookup - a sine, or any other wave shape. In the case of PDM, the output is a square wave with the narrowest absolute pulse width possible: one clock step. A really high frequency clock is used. When the frequency of the NCO is varied, that pulse (1) stays the same absolute width, but the gap (0) gets longer or shorter, changing the effective percent pulse width overall, and that frequency change basically controls the density of the pulses.

The desired output voltage (after filtering) is set by changing the frequency.


In comparison, PWM keeps the frequency the same, uses the counter to generate a ramp wave internally, and then uses a threshold to decide whether to output a 1 or 0 via (digital) comparator. The final output is a square wave of a fixed frequency but varying percent pulse width.

The desired output voltage (after filtering) is set by changing the percent pulse width.

Brian


On Dec 11, 2023, at 5:47 PM, cheater cheater wrote:
>> For each constant that you repeatedly add to the NCO you get a unique bit-pattern generated
> 
> how is this bit pattern generated?
> 
> On Mon, Dec 11, 2023 at 11:08?AM <rburnett at richieburnett.co.uk> wrote:
>> 
>> For each constant that you repeatedly add to the NCO you get a unique
>> bit-pattern generated.  And the amount of 1's in one period of that bit
>> pattern is proportional to the constant that you add into the NCO.  The
>> funky pattern is a graphical representation of this...
>> 
>> Notice how the plot is lighter at the bottom and darker towards the top.
>>  That is because the density of 1's and 0's changes as you move up the
>> plot and the constant being added into the NCO is larger.  White pixels
>> look like they represent 0's and black pixels represent 1's.  The bottom
>> row is white right across, so that is a run of 256 zeros.  The top row
>> is black right across, so that's a run of 256 ones.  And all of the rows
>> in between have varying numbers of 0's and 1's roughly evenly
>> distributed across the row.
>> 
>> Now if you look at the equivalent picture for PWM you'll see that all of
>> the 0's (white pixels) and 1's (black pixels) are grouped together in
>> each row.  That is because PWM goes high for the programmed pulse width
>> then returns low for the remainder of the period.
>> 
>> Now I'm wondering what my "bit reversed PWM" would look like on one of
>> these plots...?
>> 
>> -Richie,
>> 
>> 
>> On 2023-12-11 09:54, cheater cheater via Synth-diy wrote:
>>>> He's plotted the output from the algorithm as black and white pixels
>>>> (the x axis) for each "DAC output value" (the y-axis).
>>> 
>>> ugh, still struggling. i don't know what that means. :S
>>> 
>>> On Mon, Dec 11, 2023 at 10:29?AM Tom Wiltshire
>>> wrote:
>>>> 
>>>> He's plotted the output from the algorithm as black and white pixels
>>>> (the x axis) for each "DAC output value" (the y-axis).
>>>> 
>>>> The difference between the "carry-bit NCO" approach (or whatever we
>>>> want to call it) and the PWM output (the final diagram, half black,
>>>> half white) is clear to see.
>>>> 
>>>> The important thing is the way that the black and white pixels are far
>>>> more mixed up- e.g. the noise is of much higher frequency, and
>>>> therefore much easier to filter out.
>>>> 
>>>> 
>>>> On 11 Dec 2023, at 08:59, cheater cheater via Synth-diy
>>>> <synth-diy at synth-diy.org> wrote:
>>>> 
>>>> Thanks, sorry, I still don't understand this:
>>>> 
>>>>> Each horizontal row of the chart is the waveform generated for the constant input on the y-axis.
>>>> 
>>>> what do you mean by that?
>>>> 
>>>> BTW, it's probably useful to send these emails to the list.
>>>> 
>>>> 
>>>> On Mon, Dec 11, 2023 at 3:01?AM David Kantowitz <dkantowitz at gmail.com>
>>>> wrote:
>>>>> 
>>>>> "carry-bit NCO" is how I summarized the approach Tom uses: output a
>>>>> pulse whenever the counter overflows.
>>>>> 
>>>>> Each horizontal row of the chart is the waveform generated for the
>>>>> constant input on the y-axis.
>>>>> y=0 -> row of all zeros (white)
>>>>> y=256 -> row of all ones (black)
>>>>> y=128 -> row of alternating ones and zeros
>>>>> 
>>>>> The interesting parts are really:
>>>>>  a) Overflow bit approach is _vastly_ better than PWM.
>>>>>  b) Most microcontrollers have a timer/counter peripheral where you
>>>>> can implement this in hardware, having almost no s/w cost, and runnig
>>>>> around the uC's clock rate (several MHz).
>>>>>  c) 1st order sigma delta converters are garbage: need a hefty
>>>>> oversampling rate and noise rises like a 45 degree line through the
>>>>> passband.
>>>>> 
>>>>> 
>>>>> 
>>>>> On Sun, Dec 10, 2023 at 12:43?PM cheater cheater
>>>>> <cheater00social at gmail.com> wrote:
>>>>>> 
>>>>>> 
>>>>>> 
>>>>>> On Sun, Dec 10, 2023 at 8:36?PM David Kantowitz
>>>>>> <dkantowitz at gmail.com> wrote:
>>>>>>> 
>>>>>>> The carry-bit NCO technique is also equivalent to a 1-bit first
>>>>>>> order sigma delta DAC.
>>>>>> 
>>>>>> 
>>>>>> Sorry,what carry-bit NCO technique? The word "carry" isn't mentioned
>>>>>> before your email.
>>>>>> 
>>>>>>> 
>>>>>>> Probably doesn't make it much easier to understand, but it does
>>>>>>> make the design conclusions from sigma delta usable.  Ex. noise
>>>>>>> shaping curves, required Over Sampling Rates vs ENOB,
>>>>>>> reconstruction filtering (see:
>>>>>>> https://en.wikipedia.org/wiki/Delta-sigma_modulation).
>>>>>>> 
>>>>>>> To help myself visualize this, I plotted the output bit patterns
>>>>>>> for each input level.  Both modulation algorithms (1-bit carry NCO
>>>>>>> and SD-1) produced the same chart.
>>>>>>> 
>>>>>>> DC level is y-axis, time is x-axis.
>>>>>> 
>>>>>> 
>>>>>> I'm having trouble understanding these graphs. What's going on in
>>>>>> them? "DC level is y-axis" doesn't seem to make sense in a plot that
>>>>>> has multiple y values per one x value. What am I missing here?
>>>>>> 
>>>>>>> 
>>>>>>> <image.png>
>>>>>>> Repeated 4 times to help imagine the oversampling:
>>>>>>> <image.png>
>>>>>>> 
>>>>>>> For comparison basic PWM looks like:
>>>>>>> <image.png>
>>>>>>> 
>>>>>>> By looking across a horizontal line, you can easily see the
>>>>>>> carry-bit approach has a vast reduction in low frequency content
>>>>>>> compared to PWM.  That is, the digital signal 'noise' is being
>>>>>>> pushed into higher frequencies.  However, there's still plenty of
>>>>>>> repeating pattern in the NCO/SD-1
>>>>>>> 
>>>>>>> 
>>>>>>> On Fri, Dec 8, 2023 at 1:43?PM Tom Wiltshire
>>>>>>> <tom at electricdruid.net> wrote:
>>>>>>>> 
>>>>>>>> Honestly, it's not. It's just that damn simple. The version I
>>>>>>>> actually wrote was all hardware module set-up specific to the
>>>>>>>> device, and basically nothing else, so wouldn't tell you anything.
>>>>>>>> Turning it all into software loses a lot of the benefit, so
>>>>>>>> doesn't make much sense, except to explain it.
>>>>>>>> 
>>>>>>>> Play with some NCOs a bit, and then get them to make a single
>>>>>>>> pulse when they wrap. And then - Bingo! You're there!
>>>>>>>> 
>>>>>>>> If you thought something was missing, what exactly? Ask a more
>>>>>>>> specific question and perhaps I can help fill in a blank. I well
>>>>>>>> remember how weird this stuff seemed when I first met it, so I
>>>>>>>> think I understand the position you're in now.
>>>>>>>> 
>>>>>>>> 
>>>>>>>>> On 8 Dec 2023, at 21:18, cheater cheater <cheater00social at gmail.com> wrote:
>>>>>>>>> 
>>>>>>>>> I don't get it. Most of the algorithm is missing.
>>>>>>>>> 
>>>>>>>>> On Fri, Dec 8, 2023 at 10:07?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> On 8 Dec 2023, at 20:30, cheater cheater <cheater00social at gmail.com> wrote:
>>>>>>>>>> 
>>>>>>>>>> On Fri, Dec 8, 2023 at 5:06?PM Tom Wiltshire <tom at electricdruid.net> wrote:
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> On 8 Dec 2023, at 14:41, Matthew Skala via Synth-diy <synth-diy at synth-diy.org> wrote:
>>>>>>>>>> 
>>>>>>>>>> If PDM means PWM with bit-reversal before the comparison (such as Richie
>>>>>>>>>> describes), then it does indeed lock you into a lower sampling rate, and
>>>>>>>>>> that's one reason I skipped describing *that* technique.  But PWM with
>>>>>>>>>> bit-reversal seems not to be what you mean when you say PDM.
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> That's not what I meant when I said PDM, certainly.
>>>>>>>>>> 
>>>>>>>>>> The way I generated it is using an NCO. The NCO generates a single-shot output pulse everytime the phase accumulator wraps.
>>>>>>>>>> 
>>>>>>>>>> Now consider what happens with a simple 8-bit NCO. If our frequency increment is 2, for example, we get a single output pulse every 128 clocks, or 2 pulses per 256 clocks. Notice that they will be nicely spaced apart, not next to each other like PWM. The output frequency would be (clock frequency / 128) in this situation.
>>>>>>>>>> If the increment is 8, we get a output pulse every 32 clocks, 8 pulses per 256 clocks, and again, they're nicely spaced out. The output frequency is now up to (clock /32) so there's been a big improvement, just by getting away from those extreme values a little bit.
>>>>>>>>>> As the increment climbs, the accumulator wraps more and more often. At freq=128, every other clock is an output and we reach our maximum output frequency of (clock/2). As the increment goes above half, we start staying high for more than a single pulse, and the waveform effectively turns the other way up and we get a mirror image of the effect we've seen from 0-128.
>>>>>>>>>> 
>>>>>>>>>> HTH,
>>>>>>>>>> Tom
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> I've read this a few times but I'm struggling to understand what's
>>>>>>>>>> going on. Can someone type out an algorithm or something like that?
>>>>>>>>>> Would appreciate it a lot. Thanks.
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> Ok, it'd look something like this:
>>>>>>>>>> 
>>>>>>>>>> phase: 16-bit variable (for example)
>>>>>>>>>> freq: 16-bit variable (same as phase)
>>>>>>>>>> 
>>>>>>>>>> So we do:
>>>>>>>>>> 
>>>>>>>>>> // Increment phase accumulator
>>>>>>>>>> phase = phase + freq
>>>>>>>>>> 
>>>>>>>>>> // Did phase wraparound?
>>>>>>>>>> If (phase>65535) { // There are probably better ways to do this test, if it's even required.
>>>>>>>>>> // Ok, phase wrapped
>>>>>>>>>> phase = phase % 65536
>>>>>>>>>> // output a pulse a single clock in length
>>>>>>>>>> <this is implementation dependent!>
>>>>>>>>>> }
>>>>>>>>>> 
>>>>>>>>>> All you need to do is run this code at a fast clock rate and you're off. Of course, the better way is if you can hand some of this overhead to hardware, and some modern uPs include NCOs as a peripheral and can be set up for this "single shot pulse output" mode, which means that the while thing boils down to simply updating the "freq" frequency increment variable with your current output. It's dead simple.
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> There's a page about NCOs in general on my website:
>>>>>>>>>> 
>>>>>>>>>> https://electricdruid.net/direct-digital-synthesis/
>>>>>>>>>> 
>>>>>>>>>> HTH,
>>>>>>>>>> Tom




From brianw at audiobanshee.com  Tue Dec 12 04:03:19 2023
From: brianw at audiobanshee.com (brianw)
Date: Mon, 11 Dec 2023 19:03:19 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
Message-ID: <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>



On Dec 11, 2023, at 9:04 AM, Vladimir Pantelic wrote:
> On 12/11/23 17:00, Mike Bryant wrote:
>> Using SPI requires continuous mode which I'm not sure most STM32s support.
> 
> should be no isssue when doing circular DMA (and the source memory can keep up)

The limitation is not pulling data from memory via DMA, but placing that data on the SPI bus given a clock rate. 16-bit data takes at least 16 clocks for the data, plus maybe another clock for a gap between words, depending upon how the two sides (CPU and external device) are designed.

I believe that Mike is using the phrase, continuous mode, to refer to SPI transfers that do not lose a clock cycle between words. i.e. Every clock cycle has data, with no gap, and thus continuous data.


Beyond merely the various interpretations of SPI for general communications, there's also the serial digital audio bit stream busses that are common. Those tend to have a clock signal, a data bit, a word sync bit, and sometimes a channel sync bit. For digital audio CODECs, every clock is accompanied by a new data bit. The word sync keeps each audio sample separate, usually by asserting at or before the first bit of each new word. The channel sync bit is used for stereo and other multichannel streams, and is asserted for the first channel in the sequence, usually left for stereo, or Channel 0 for multichannel. I think there's never a gap for dedicated digital audio streams.

Regular SPI protocols that aren't specifically for audio usually don't have the extra bits for synchronizing words and thus they have to use some other technique to know which bits belong together in a sample value. Sometimes that's done by flipping the Chip Select between each word, sometimes it's with a gap in the data, or the devices simply count clocks and thus will get way out of sync if a single clock is missed.

Brian




From dkantowitz at gmail.com  Tue Dec 12 04:35:56 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Mon, 11 Dec 2023 19:35:56 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
 <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
Message-ID: <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>

This has been a lively topic. Here's a plot of the "bit reversed pwm":

[image: image.png]
[image: image.png]


and python snippet to update the .ipynb:
def mwp(bitdepth, copies):
    """bit reversed pwm"""
    a = np.zeros((pow(2,bitdepth)+1, pow(2,bitdepth)*copies), dtype=np.uint)
    maxval = pow(2,bitdepth)
    for i in range(0,maxval+1):
        for t in range(0,a.shape[1]):
            acc = t%(maxval)
            b = '{:0{w}b}'.format(acc, w=bitdepth)
            rev = int(b[::-1], 2)
            a[i,t] = rev < i
    return a
plt.figure(figsize=(16,16))
plt.imshow(mwp(8, 1), cmap='binary', origin='lower')
plt.figure(figsize=(16,4))
plt.imshow(mwp(8, 4), cmap='binary', origin='lower')

On Mon, Dec 11, 2023 at 7:05?PM brianw <brianw at audiobanshee.com> wrote:

>
>
> On Dec 11, 2023, at 9:04 AM, Vladimir Pantelic wrote:
> > On 12/11/23 17:00, Mike Bryant wrote:
> >> Using SPI requires continuous mode which I'm not sure most STM32s
> support.
> >
> > should be no isssue when doing circular DMA (and the source memory can
> keep up)
>
> The limitation is not pulling data from memory via DMA, but placing that
> data on the SPI bus given a clock rate. 16-bit data takes at least 16
> clocks for the data, plus maybe another clock for a gap between words,
> depending upon how the two sides (CPU and external device) are designed.
>
> I believe that Mike is using the phrase, continuous mode, to refer to SPI
> transfers that do not lose a clock cycle between words. i.e. Every clock
> cycle has data, with no gap, and thus continuous data.
>
>
> Beyond merely the various interpretations of SPI for general
> communications, there's also the serial digital audio bit stream busses
> that are common. Those tend to have a clock signal, a data bit, a word sync
> bit, and sometimes a channel sync bit. For digital audio CODECs, every
> clock is accompanied by a new data bit. The word sync keeps each audio
> sample separate, usually by asserting at or before the first bit of each
> new word. The channel sync bit is used for stereo and other multichannel
> streams, and is asserted for the first channel in the sequence, usually
> left for stereo, or Channel 0 for multichannel. I think there's never a gap
> for dedicated digital audio streams.
>
> Regular SPI protocols that aren't specifically for audio usually don't
> have the extra bits for synchronizing words and thus they have to use some
> other technique to know which bits belong together in a sample value.
> Sometimes that's done by flipping the Chip Select between each word,
> sometimes it's with a gap in the data, or the devices simply count clocks
> and thus will get way out of sync if a single clock is missed.
>
> Brian
>
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
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> Selling or trading? Use marketplace at synth-diy.org
>
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From dkantowitz at gmail.com  Tue Dec 12 06:32:02 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Mon, 11 Dec 2023 21:32:02 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
 <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
 <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>
Message-ID: <CAEfLrHF0nDsNEWNWwJM-t1b_0P9H6CNqw0_8XGbRYRQirQ-mtw@mail.gmail.com>

... and 2nd-order sigma delta.  I might have the algorithm
[image: image.png]
[image: image.png]

def sigdelt2(bitdepth, copies):
    a = np.zeros((pow(2,bitdepth)+1, pow(2,bitdepth)*copies), dtype=np.uint)
    maxval = pow(2,bitdepth)
    for i in range(0,maxval+1):
        # s(t) = input(t) + 2 * e(n-1) - e(n-2)
        # e(t) = s(t) - output(t)
        # output(t) = s(t) >= maxval ? 1 : 0
        e_1, e_2 = 0,0
        for t in range(0,a.shape[1]):
            s = i + 2 * e_1 - e_2
            out = 1 if (s >= maxval) else 0
            e_2 = e_1
            e_1 = s - maxval*out
            a[i,t] = out
    return a

plt.figure(figsize=(16,16))
plt.imshow(sigdelt2(8, 1), cmap='binary', origin='lower')
plt.figure(figsize=(16,4))
plt.imshow(sigdelt2(8, 4), cmap='binary', origin='lower')

On Mon, Dec 11, 2023 at 7:35?PM David Kantowitz <dkantowitz at gmail.com>
wrote:

> This has been a lively topic. Here's a plot of the "bit reversed pwm":
>
> [image: image.png]
> [image: image.png]
>
>
> and python snippet to update the .ipynb:
> def mwp(bitdepth, copies):
>     """bit reversed pwm"""
>     a = np.zeros((pow(2,bitdepth)+1, pow(2,bitdepth)*copies),
> dtype=np.uint)
>     maxval = pow(2,bitdepth)
>     for i in range(0,maxval+1):
>         for t in range(0,a.shape[1]):
>             acc = t%(maxval)
>             b = '{:0{w}b}'.format(acc, w=bitdepth)
>             rev = int(b[::-1], 2)
>             a[i,t] = rev < i
>     return a
> plt.figure(figsize=(16,16))
> plt.imshow(mwp(8, 1), cmap='binary', origin='lower')
> plt.figure(figsize=(16,4))
> plt.imshow(mwp(8, 4), cmap='binary', origin='lower')
>
> On Mon, Dec 11, 2023 at 7:05?PM brianw <brianw at audiobanshee.com> wrote:
>
>>
>>
>> On Dec 11, 2023, at 9:04 AM, Vladimir Pantelic wrote:
>> > On 12/11/23 17:00, Mike Bryant wrote:
>> >> Using SPI requires continuous mode which I'm not sure most STM32s
>> support.
>> >
>> > should be no isssue when doing circular DMA (and the source memory can
>> keep up)
>>
>> The limitation is not pulling data from memory via DMA, but placing that
>> data on the SPI bus given a clock rate. 16-bit data takes at least 16
>> clocks for the data, plus maybe another clock for a gap between words,
>> depending upon how the two sides (CPU and external device) are designed.
>>
>> I believe that Mike is using the phrase, continuous mode, to refer to SPI
>> transfers that do not lose a clock cycle between words. i.e. Every clock
>> cycle has data, with no gap, and thus continuous data.
>>
>>
>> Beyond merely the various interpretations of SPI for general
>> communications, there's also the serial digital audio bit stream busses
>> that are common. Those tend to have a clock signal, a data bit, a word sync
>> bit, and sometimes a channel sync bit. For digital audio CODECs, every
>> clock is accompanied by a new data bit. The word sync keeps each audio
>> sample separate, usually by asserting at or before the first bit of each
>> new word. The channel sync bit is used for stereo and other multichannel
>> streams, and is asserted for the first channel in the sequence, usually
>> left for stereo, or Channel 0 for multichannel. I think there's never a gap
>> for dedicated digital audio streams.
>>
>> Regular SPI protocols that aren't specifically for audio usually don't
>> have the extra bits for synchronizing words and thus they have to use some
>> other technique to know which bits belong together in a sample value.
>> Sometimes that's done by flipping the Chip Select between each word,
>> sometimes it's with a gap in the data, or the devices simply count clocks
>> and thus will get way out of sync if a single clock is missed.
>>
>> Brian
>>
>>
>> ________________________________________________________
>> This is the Synth-diy mailing list
>> Submit email to: Synth-diy at synth-diy.org
>> View archive at: https://synth-diy.org/pipermail/synth-diy/
>> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
>> Selling or trading? Use marketplace at synth-diy.org
>>
>
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From lijon at kymatica.com  Tue Dec 12 10:03:04 2023
From: lijon at kymatica.com (Jonatan Liljedahl)
Date: Tue, 12 Dec 2023 10:03:04 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
Message-ID: <CALfiFhCDq=YXYPNaHFjW3G2m5hv3tJC79vjDRoaP8K+A3m0xkQ@mail.gmail.com>

I finally found where I saw the SPI PDM trick:

https://github.com/jfdelnero/HxCModPlayer/blob/master/STM32/STM32F1XX/Src/fast_delta_sigma_gen.s

Demo video:
https://youtu.be/AQ--IiXPUGA?si=6eaj7ni2re2MqyVO

Cheers
/Jonatan

On Mon, 11 Dec 2023 at 16:49, Jonatan Liljedahl <lijon at kymatica.com> wrote:

> I did a similar plot when I was experimenting with
> sigma-delta/noise-shaping output from an STM32, but in ASCII :)
> There's one trick where an SPI peripheral is used for "high quality"
> audio PDM output, but I never was able to get any usable performance
> from it. I even got better results just using 8 bit PWM but with
> sigma-delta noise shaping. (But I settled on using the built-in 12 bit
> DAC instead)
>
> Cheers
> /Jonatan
>
> On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl> wrote:
> >
> > This is awesome! Such a simple trick helps to visualize it so quickly.
> > Testing different patterns to further minimize any repeatability seems
> > like pleasant adventure now and doesn't even require any test equipment.
> >
> > Roman
>
> --
> /Jonatan
> http://kymatica.com
>
-- 
/Jonatan
http://kymatica.com
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From modular at go2.pl  Tue Dec 12 10:58:48 2023
From: modular at go2.pl (Roman Sowa)
Date: Tue, 12 Dec 2023 10:58:48 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
Message-ID: <c89a77bb-1370-64ad-e94f-7b6f8c00bf06@go2.pl>

This looks like Christmas postcard
Lovely

Roman

W dniu 2023-12-11 o?16:49, Jonatan Liljedahl pisze:
> I did a similar plot when I was experimenting with
> sigma-delta/noise-shaping output from an STM32, but in ASCII :)
> There's one trick where an SPI peripheral is used for "high quality"
> audio PDM output, but I never was able to get any usable performance
> from it. I even got better results just using 8 bit PWM but with
> sigma-delta noise shaping. (But I settled on using the built-in 12 bit
> DAC instead)
> 
> Cheers
> /Jonatan
> 
> On Mon, Dec 11, 2023 at 4:19?PM Roman Sowa <modular at go2.pl> wrote:
>>
>> This is awesome! Such a simple trick helps to visualize it so quickly.
>> Testing different patterns to further minimize any repeatability seems
>> like pleasant adventure now and doesn't even require any test equipment.
>>
>> Roman
> 
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From rburnett at richieburnett.co.uk  Tue Dec 12 11:17:47 2023
From: rburnett at richieburnett.co.uk (rburnett at richieburnett.co.uk)
Date: Tue, 12 Dec 2023 10:17:47 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHF0nDsNEWNWwJM-t1b_0P9H6CNqw0_8XGbRYRQirQ-mtw@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
 <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
 <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>
 <CAEfLrHF0nDsNEWNWwJM-t1b_0P9H6CNqw0_8XGbRYRQirQ-mtw@mail.gmail.com>
Message-ID: <18a412cb60f6e63b3cd847293e338e98@richieburnett.co.uk>

Fascinating!  The reversed PWM one still looks very regular, which 
should not come as a surprise.  It would be interesting to see the 
resulting spectra for these different techniques too.  The Delta-Sigma 
is obviously better at "shaping" the switching noise up to high 
frequencies than the PWM based methods.

Does the 2nd order delta-sigma pattern still repeat after 256 bits?  Or 
did you just show the first 256 bits of a longer sequence?

-Richie,


On 2023-12-12 05:32, David Kantowitz via Synth-diy wrote:
> ... and 2nd-order sigma delta.  I might have the algorithm


From dkantowitz at gmail.com  Tue Dec 12 15:51:10 2023
From: dkantowitz at gmail.com (David Kantowitz)
Date: Tue, 12 Dec 2023 06:51:10 -0800
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <18a412cb60f6e63b3cd847293e338e98@richieburnett.co.uk>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
 <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
 <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>
 <CAEfLrHF0nDsNEWNWwJM-t1b_0P9H6CNqw0_8XGbRYRQirQ-mtw@mail.gmail.com>
 <18a412cb60f6e63b3cd847293e338e98@richieburnett.co.uk>
Message-ID: <CAEfLrHG=GPU+u8Nw5Ybhag3Z57yrRkavn4px=dZrFYO+1oa9gg@mail.gmail.com>

The plot with 4 segments is what happens when the single, constant input
value is processed for 1024 time steps (ie. I did not copy & paste
to graphically put together a longer image).  To me, it looks like 2nd
order converter takes 512 time steps to get through its entire cycle.

Frequency domain analysis seems necessary to understand 2nd order
and beyond.  Especially when  you consider 2nd order isn't good enough
to make commercial sigma-delta DACs.

The time domain plots do make a few things clearer:
  a) 1st order is better (for audio) than PWM and reverse-PWM and is as
easy to implement.
  b) 2nd order is much better than 1st, but requires(?) software or fpga.
  c) Things get really crappy at the highest and lowest input values.

For a practical converter, as Tom wrote, you really need to not use the
top/bottom ~10% and rescale.  Also, I read that a 2nd order sigma-delta
has some pathological signal input cases where the feedback goes
unstable at the high and low values ... which is also solved by not using
some % of the highest and lowest values.

Which left me not sure how exactly to create a useful spectral view.

Someone else asked about errors from edge shape & jitter.  I'm guessing
jitter doesn't matter much at the expected oversampling rates of 64 to 256.
Especially if that jitter is random.  Edge asymmetry, while barely a problem
for PWM, is a significant source of error for the noise shaping approaches.
Schlappi alluded to this when he described the analog section for his fpga
based converters in his 3 body module.



On Tue, Dec 12, 2023 at 2:20?AM <rburnett at richieburnett.co.uk> wrote:

> Fascinating!  The reversed PWM one still looks very regular, which
> should not come as a surprise.  It would be interesting to see the
> resulting spectra for these different techniques too.  The Delta-Sigma
> is obviously better at "shaping" the switching noise up to high
> frequencies than the PWM based methods.
>
> Does the 2nd order delta-sigma pattern still repeat after 256 bits?  Or
> did you just show the first 256 bits of a longer sequence?
>
> -Richie,
>
>
> On 2023-12-12 05:32, David Kantowitz via Synth-diy wrote:
> > ... and 2nd-order sigma delta.  I might have the algorithm
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From tom at electricdruid.net  Tue Dec 12 17:55:37 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Tue, 12 Dec 2023 16:55:37 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHG=GPU+u8Nw5Ybhag3Z57yrRkavn4px=dZrFYO+1oa9gg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
 <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
 <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>
 <CAEfLrHF0nDsNEWNWwJM-t1b_0P9H6CNqw0_8XGbRYRQirQ-mtw@mail.gmail.com>
 <18a412cb60f6e63b3cd847293e338e98@richieburnett.co.uk>
 <CAEfLrHG=GPU+u8Nw5Ybhag3Z57yrRkavn4px=dZrFYO+1oa9gg@mail.gmail.com>
Message-ID: <1746123D-B712-416B-97AC-227143BAF875@electricdruid.net>


> On 12 Dec 2023, at 14:51, David Kantowitz via Synth-diy <synth-diy at synth-diy.org> wrote:
> 
> For a practical converter, as Tom wrote, you really need to not use the
> top/bottom ~10% and rescale.

Yes. For audio, this would be a good idea, and this is really pretty easy to do. After all, for a signal that mostly hangs around the centre line, we only rarely go to the far extremes, and we can simply turn the volume down to avoid them completely.
For my StompLFO firmware, which uses a PDM output, I was able to go closer to the extremes, since the signal bandwidth (a ramp wave at 25Hz is the worst) is so far away from the clock frequency (2MHz, iirc) that the filtering can deal with the rest.

I was interested to see that the bit-reversed PWM has the same property - the top and bottom become the worst cases, and the centre is the best, quite unlike standard PWM.

> Someone else asked about errors from edge shape & jitter.  I'm guessing
> jitter doesn't matter much at the expected oversampling rates of 64 to 256.
> Especially if that jitter is random.

For the NCO-carry case, the jitter very much *isn't* random, but creates a long pattern (and hence a low frequency). Adding genuine random jitter to wobble the pulses about a bit and break up the repetition can help spread the noise out more. This is all related to "NCO frequency spurs".

Tom


From mbryant at futurehorizons.com  Tue Dec 12 18:32:46 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Tue, 12 Dec 2023 17:32:46 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAEfLrHG=GPU+u8Nw5Ybhag3Z57yrRkavn4px=dZrFYO+1oa9gg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <a9f0a159-e05e-41b6-782e-faf7f11a3681@gmail.com>
 <56F06567-1DA5-4A69-8F8F-80BD9E4899B7@audiobanshee.com>
 <CAEfLrHHbUQHdG9LHRO0upnQJpxS3SEAC+z+ucWO76yRVPGUT8w@mail.gmail.com>
 <CAEfLrHF0nDsNEWNWwJM-t1b_0P9H6CNqw0_8XGbRYRQirQ-mtw@mail.gmail.com>
 <18a412cb60f6e63b3cd847293e338e98@richieburnett.co.uk>
 <CAEfLrHG=GPU+u8Nw5Ybhag3Z57yrRkavn4px=dZrFYO+1oa9gg@mail.gmail.com>
Message-ID: <CWLP265MB71326CF489E80A9D1333DBD0DB8EA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

>From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of David Kantowitz via Synth-diy <synth-diy at synth-diy.org>
>  Also, I read that a 2nd order sigma-delta has some pathological signal input cases where the feedback goes unstable at the high and low values ... which is also solved by not using some % of the highest and lowest values.

In this sort of system you should always implement a min and max function on the feedback filter outputs to avoid creating limit cycles.  Limiting the input range will usually keep you safe, but there is often a gotcha signal, usually some sort of shaped impulse, that catches you out.

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From markverbos at gmail.com  Tue Dec 12 22:36:08 2023
From: markverbos at gmail.com (mark verbos)
Date: Tue, 12 Dec 2023 22:36:08 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CAP92RBXZN6BCP+vG4+5dsXk2iwR_adOjKyJJVGcNoKTspQgPZg@mail.gmail.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <76093807-55EC-4F98-B378-4079C04E5B7B@stuyts.nl>
 <CAP92RBXZN6BCP+vG4+5dsXk2iwR_adOjKyJJVGcNoKTspQgPZg@mail.gmail.com>
Message-ID: <CE87F6E7-1E0B-4495-848E-5EF2EF6238BD@gmail.com>

Incidentally, if you were?. it was done with a DAC08 and AD7503. Simple cap TL064 buffer followed by 3 pole sallen key filter.

Mark




> On Dec 10, 2023, at 20:28, Mattias Rickardsson <mr at analogue.org> wrote:
> 
> Den s?n 10 dec. 2023 19:31Ben Stuyts <ben at stuyts.nl <mailto:ben at stuyts.nl>> skrev:
> Hi Mattias,
> 
> Is this is the message you are quoting? https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html <https://synth-diy.org/pipermail/synth-diy/2023-December/132104.html> If so, I do not see it in my copy of the message, nor in the Archive. So it could be something in your mail client? Or forwarder? ;-)
> 
> Touch?!!!  :'-D
> 
> /mr - not referring to the Buchla 
> 

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From mbryant at futurehorizons.com  Thu Dec 14 14:13:04 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Thu, 14 Dec 2023 13:13:04 +0000
Subject: [sdiy] Dealing with China
In-Reply-To: <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <CWLP265MB7132AD93488B0E965F56B984DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

I've got all my established contacts and find them excellent, but I still see comments here obviously not trusting Chinese suppliers and paying over the odds instead to suppliers who probably get their supplies from China anyway.

Even if you don't buy the book, it's well worth watching this video just to appreciate the scale of the Shenzhen market and how it totally dwarfs anything in the West.  There's also huge warehouses backing up these operations which she doesn't show, and of course all the PCB manufacturers and assemblers.

https://www.crowdsupply.com/machinery-enchantress/the-new-essential-guide-to-electronics-in-shenzhen

In over 20 years of buying thousands of packages from China, I've had one faulty set of ICs due to bad packaging, and two counterfeits.  All three refunded.



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From grant at musictechnologiesgroup.com  Thu Dec 14 14:48:10 2023
From: grant at musictechnologiesgroup.com (grant musictechnologiesgroup.com)
Date: Thu, 14 Dec 2023 13:48:10 +0000
Subject: [sdiy] Dealing with China
In-Reply-To: <CWLP265MB7132AD93488B0E965F56B984DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CWLP265MB7132AD93488B0E965F56B984DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <em88a57ea0-85f2-4ca4-843c-062a3b4f53d8@aa59adf9.com>

We have a CM in Taiwan that my company uses and they are very good. They provide engineering and ID as well. They have come to visit and are great people so I try to use them as much as possible. As a country, Taiwan is much better to it's populace, so there's some feel good points there.

Loosely related, here is a look at another side of USA/China relations that are troublesome:

https://www.youtube.com/watch?v=55892jT06aI

GB


------ Original Message ------
From "Mike Bryant" <mbryant at futurehorizons.com<mailto:mbryant at futurehorizons.com>>
To "SDIY" <synth-diy at synth-diy.org<mailto:synth-diy at synth-diy.org>>
Date 12/14/2023 5:13:04 AM
Subject [sdiy] Dealing with China

I've got all my established contacts and find them excellent, but I still see comments here obviously not trusting Chinese suppliers and paying over the odds instead to suppliers who probably get their supplies from China anyway.

Even if you don't buy the book, it's well worth watching this video just to appreciate the scale of the Shenzhen market and how it totally dwarfs anything in the West.  There's also huge warehouses backing up these operations which she doesn't show, and of course all the PCB manufacturers and assemblers.

https://www.crowdsupply.com/machinery-enchantress/the-new-essential-guide-to-electronics-in-shenzhen

In over 20 years of buying thousands of packages from China, I've had one faulty set of ICs due to bad packaging, and two counterfeits.  All three refunded.



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From gordonjcp at gjcp.net  Thu Dec 14 16:25:03 2023
From: gordonjcp at gjcp.net (Gordonjcp)
Date: Thu, 14 Dec 2023 15:25:03 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
Message-ID: <20231214152503.GA31290@gjcp.net>

On Sun, Dec 10, 2023 at 05:02:09PM -0800, brianw wrote:
> Exactly.
> 
> My paragraph followed a question about minimal reconstruction filtering, which is what removes images after a DAC (anti-aliasing filters prevent aliasing during ADC). Since I've seen commercial products that failed to remove images of their DAC output, I wanted to ensure that my designs don't suffer the same mistakes.
> 
> The challenge is that reconstruction filters can be expensive to do correctly, unless there's significant oversampling (which is expensive on the digital processing side). It's easy enough to plop down a single-pole low-pass, but that's not good enough in nearly all cases.

I'm not saying you're wrong, but I think you'd need to demonstrate that pretty clearly to me before I'd accept it was even detectable.

I cannot see how a continuous signal can possibly produce imaging, even if the filtering after it is quite poor.

-- 
Gordonjcp


From mbryant at futurehorizons.com  Thu Dec 14 16:53:39 2023
From: mbryant at futurehorizons.com (Mike Bryant)
Date: Thu, 14 Dec 2023 15:53:39 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <20231214152503.GA31290@gjcp.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
 <20231214152503.GA31290@gjcp.net>
Message-ID: <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>

If by 'continuous' you mean DC, then there is an image before filtering - at the sampling rate :-)


________________________________
From: Synth-diy <synth-diy-bounces at synth-diy.org> on behalf of Gordonjcp <gordonjcp at gjcp.net>
Sent: 14 December 2023 15:25
To: synth-diy at synth-diy.org <synth-diy at synth-diy.org>
Subject: Re: [sdiy] Generating a large number of CV outputs

On Sun, Dec 10, 2023 at 05:02:09PM -0800, brianw wrote:
> Exactly.
>
> My paragraph followed a question about minimal reconstruction filtering, which is what removes images after a DAC (anti-aliasing filters prevent aliasing during ADC). Since I've seen commercial products that failed to remove images of their DAC output, I wanted to ensure that my designs don't suffer the same mistakes.
>
> The challenge is that reconstruction filters can be expensive to do correctly, unless there's significant oversampling (which is expensive on the digital processing side). It's easy enough to plop down a single-pole low-pass, but that's not good enough in nearly all cases.

I'm not saying you're wrong, but I think you'd need to demonstrate that pretty clearly to me before I'd accept it was even detectable.

I cannot see how a continuous signal can possibly produce imaging, even if the filtering after it is quite poor.

--
Gordonjcp
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From gordonjcp at gjcp.net  Thu Dec 14 22:27:53 2023
From: gordonjcp at gjcp.net (Gordonjcp)
Date: Thu, 14 Dec 2023 21:27:53 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
 <20231214152503.GA31290@gjcp.net>
 <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <20231214212753.GB31290@gjcp.net>

On Thu, Dec 14, 2023 at 03:53:39PM +0000, Mike Bryant wrote:
> If by 'continuous' you mean DC, then there is an image before filtering - at the sampling rate :-)
> 

No. If you've got a DC output from a DAC, it's just that - DC. There's no change in level. You're writing the same value to it over and over, and it does not change.

The output from a DAC is continuous. It does not have steps. It has steep slopes, but not steps. Even then, that's not going to allow the sample rate to leak out particularly. If you pick a pathological case where your DAC is swinging fully positive for one sample time and fully negative the next, you'll get a signal at half the sample rate. Even though that's a squarewave right at Nyquist, it still won't alias, because the harmonics are being generated *after* the discrete-time part.

So I'm having a hard time seeing where these images could come from, or how you'd ever detect them. You definitely couldn't hear them.

-- 
Gordonjcp


From tom at electricdruid.net  Thu Dec 14 23:36:48 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Thu, 14 Dec 2023 22:36:48 +0000
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <20231214212753.GB31290@gjcp.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
 <20231214152503.GA31290@gjcp.net>
 <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <20231214212753.GB31290@gjcp.net>
Message-ID: <D5C48431-B1BD-473F-85B2-596B211B22DF@electricdruid.net>



> On 14 Dec 2023, at 21:27, Gordonjcp <gordonjcp at gjcp.net> wrote:
> 
> On Thu, Dec 14, 2023 at 03:53:39PM +0000, Mike Bryant wrote:
>> If by 'continuous' you mean DC, then there is an image before filtering - at the sampling rate :-)
>> 
> 
> No. If you've got a DC output from a DAC, it's just that - DC. There's no change in level. You're writing the same value to it over and over, and it does not change.
> 
> The output from a DAC is continuous. It does not have steps. It has steep slopes, but not steps. Even then, that's not going to allow the sample rate to leak out particularly. If you pick a pathological case where your DAC is swinging fully positive for one sample time and fully negative the next, you'll get a signal at half the sample rate. Even though that's a squarewave right at Nyquist, it still won't alias, because the harmonics are being generated *after* the discrete-time part.
> 
> So I'm having a hard time seeing where these images could come from, or how you'd ever detect them. You definitely couldn't hear them.


The basic principle is that a given set of DAC output samples don't have a single interpretation, but many. Yes, the samples *could* represent a waveform below Nyquist, and they'd all be exactly where we expect them to be. But they *could equally well* represent a waveform *above* Nyquist and they'd *still* all be exactly where we expect them to be. Here's a little diagram demonstrating the idea - which of these two sinewaves was the intended output?
This can be extended indefinitely to higher and higher frequencies. If we want to limit the DAC's output to signals within a certain band, we *actually have to do that*, we can't assume it is already done for us. Maybe we can't *hear* them, but that doesn't mean we didn't just create a ton of ultrasonic noises, because we most likely did.

At least, that's how I understand it. If that's not right, perhaps someone else can correct me.
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From mskala at northcoastsynthesis.com  Fri Dec 15 00:05:31 2023
From: mskala at northcoastsynthesis.com (mskala at northcoastsynthesis.com)
Date: Thu, 14 Dec 2023 18:05:31 -0500 (EST)
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <D5C48431-B1BD-473F-85B2-596B211B22DF@electricdruid.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
 <20231214152503.GA31290@gjcp.net>
 <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <20231214212753.GB31290@gjcp.net>
 <D5C48431-B1BD-473F-85B2-596B211B22DF@electricdruid.net>
Message-ID: <alpine.LNX.2.20.2312141754080.27776@kharasan.bonobo-conspiracy.ca>

On Thu, 14 Dec 2023, Tom Wiltshire wrote:

> The basic principle is that a given set of DAC output samples don't have
> a single interpretation, but many. Yes, the samples *could* represent a
> waveform below Nyquist, and they'd all be exactly where we expect them
> to be. But they *could equally well* represent a waveform *above*
> Nyquist and they'd *still* all be exactly where we expect them to be.

One way I think of it is that even if DAC output doesn't have
theoretically perfect discontinuous steps in the time domain, the smooth
curves between the sample moments end up looking like a filtered version
of such discontinuous steps.  And unless the filtering is a perfect brick
wall in the frequency domain - which, as you say, is only going to happen
with a lot of effort, not by accident - then some of the higher
frequencies of the stair-step signal will still exist.

> higher and higher frequencies. If we want to limit the DAC's output to
> signals within a certain band, we *actually have to do that*, we can't
> assume it is already done for us. Maybe we can't *hear* them, but that

It's all the more true when the DAC is using temporal oversampling like
the PWM, delta-sigma, and variants that featured in this thread earlier.
Some parts of the system are pushing around signals containing harmonics
of the sample rate, and the output is directly derived from such signals.
"Image" frequencies are just intermod products between sample-rate
harmonics and the desired signal.  It's a lot to ask that the image
frequencies wouldn't appear in the output at least a little bit, and
that's certainly not something we can expect by default, nor a natural
expectation from the fact the signals are continuous.

-- 
Matthew Skala
North Coast Synthesis Ltd.


From modular at go2.pl  Fri Dec 15 10:14:55 2023
From: modular at go2.pl (Roman Sowa)
Date: Fri, 15 Dec 2023 10:14:55 +0100
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <20231214212753.GB31290@gjcp.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
 <20231214152503.GA31290@gjcp.net>
 <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <20231214212753.GB31290@gjcp.net>
Message-ID: <47890976-4117-05c8-73e2-f82c1d5ea90a@go2.pl>

Unfiltered, steppy, non-oversampled DAC oputput does contain higher 
images of the signal repeated at sampling frequency multiples. If there 
was no images up there, the waveform would not look steppy at all but 
smooth. However, the images do not carry the same power as fundamental 
one, like it would be the case if the samples were very short pulses, 
not steps. The upper images of such steps fade away pretty quickly with 
frequency and even the first one isn't that big either.

If we subtract wanted smooth signal from steppy DAC output, all we get 
is the sampling noise in a form of modulated up and down ramps, almost 
like sawtooth wave of frequency equal to sampling frequency. So this 
will produce images centered at multiples of sampling frequency, with 
amplitude decreasing in a rate of 1/n where n is multiple of sampling 
frequency. The power of first image will be determined by individual 
sample step sizes. In that pathological case of toggling between min and 
max value, resulting "ramp" amplitude is also full scale, so the images 
will be screaming. But in case of regular music signal this will be 
couple of %. Although something like crash cymbal will produce many big 
steps, creating enormous power in upper spectrum.

And since the images are still there, it only takes one nonlinearity in 
the output stage to intermodulate upper unwanted frequencies and 
downshift them to audio range, causing whistles and buzzes all over the 
audio spectrum.

Roman

W dniu 2023-12-14 o?22:27, Gordonjcp pisze:
> On Thu, Dec 14, 2023 at 03:53:39PM +0000, Mike Bryant wrote:
>> If by 'continuous' you mean DC, then there is an image before filtering - at the sampling rate :-)
>>
> 
> No. If you've got a DC output from a DAC, it's just that - DC. There's no change in level. You're writing the same value to it over and over, and it does not change.
> 
> The output from a DAC is continuous. It does not have steps. It has steep slopes, but not steps. Even then, that's not going to allow the sample rate to leak out particularly. If you pick a pathological case where your DAC is swinging fully positive for one sample time and fully negative the next, you'll get a signal at half the sample rate. Even though that's a squarewave right at Nyquist, it still won't alias, because the harmonics are being generated *after* the discrete-time part.
> 
> So I'm having a hard time seeing where these images could come from, or how you'd ever detect them. You definitely couldn't hear them.
> 


From j.rohs11 at gmail.com  Fri Dec 15 19:25:31 2023
From: j.rohs11 at gmail.com (Josh Rohs)
Date: Fri, 15 Dec 2023 12:25:31 -0600
Subject: [sdiy] Generating a large number of CV outputs
In-Reply-To: <20231214212753.GB31290@gjcp.net>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <930B4030-BEA5-4360-8970-0024181ECC75@audiobanshee.com>
 <CAP92RBV7Ov0OooKFLCx61NN2=ooMqTT_AV5HKQOGF=u=vP-zHA@mail.gmail.com>
 <D3116625-8694-45BC-AFBC-6277A47E35D8@audiobanshee.com>
 <20231210213357.GA22300@gjcp.net>
 <CWLP265MB7132D454BD90AAEC2254EFD3DB88A@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CAGn5V-9RUACA_ESYEOtaYBGvSA0OXnRJeLFV=5Pb7DzEt7uS7Q@mail.gmail.com>
 <60FB5222-B12A-4C4E-98C3-B27D859F97C1@audiobanshee.com>
 <20231214152503.GA31290@gjcp.net>
 <CWLP265MB7132C803E5D39B8CD15DEF24DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <20231214212753.GB31290@gjcp.net>
Message-ID: <CA+LQ0R=YwUSrLWiBsr_w5UxXoQRw=eS8hbm7yacGQzoJAQkA5A@mail.gmail.com>

>
> So I'm having a hard time seeing where these images could come from, or
> how you'd ever detect them. You definitely couldn't hear them.
>
> This is highly context-specific. Depends on 1) your sample rate or more
particularly, 2) the ratio of your sample rate to signal bandwidth 3) as
Roman said, the presence of any nonlinearity in the path

You are right that there is no such thing as an instantaneous step in the
real world, but for audio purposes I think it's reasonable to consider the
continuous time impulse response to be a "boxcar" considering the rise time
in relation to the sample period.

We can think of the DAC output as our discrete signal passed through a
0-order hold of period 1/Fs; the discrete signal contains images at integer
multiples of the sample rate. These images are the *same* level as the
baseband signal in the discrete domain - I think this is what Tom was
getting at. Only when we pass the discrete signal through the DAC (0-order
hold) do we shape the output spectrum(including those images), which you
can picture as a train of scaled pulses convolved with the frequency
response of the ZOH.

The ZOH is basically a crappy lowpass filter. Attenuation at FS/2 is like
4db. for a high bandwidth signal, this is *not acceptable* generally, so
use reconstruction filters to 1) attenuate the images and 2) possibly
correct for passband droop due to the SIN(X)/X attenuation of the ZOH. the
second one is probably done more in non-audio applications. Basically, we
try to filter our steppy signal back into the perfect band limited version
we intended, but there is no causal brick wall filter, so this is
theoretically impossible. The best you can hope for is to push those images
far down enough that they're below the noise floor/threshold of human
hearing.

Re: being able to hear those images: if you sample high enough, it likely
won't be a problem, in a perfect world. but since we're talking about
synthesizers here, nonlinearities will undoubtedly exist, as roman
references. All it takes is mild intermodulation to bring those images back
into baseband.

As always, this is all dependent on context/application.
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From john at sleefamily.org  Sat Dec 16 01:21:33 2023
From: john at sleefamily.org (jslee)
Date: Sat, 16 Dec 2023 11:21:33 +1100
Subject: [sdiy] Dealing with China
In-Reply-To: <CWLP265MB7132AD93488B0E965F56B984DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
References: <CACn5rYFn-Zf-SDQXNWS-FTnDf3MLf3RNby6hcUNarVZh0id0cQ@mail.gmail.com>
 <alpine.LNX.2.20.2312072016190.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB713239EDBBA5DFAB587A7241DB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312072200100.8337@kharasan.bonobo-conspiracy.ca>
 <CWLP265MB7132052EA4786302EDCF7FDADB8AA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <alpine.LNX.2.20.2312080931150.6308@kharasan.bonobo-conspiracy.ca>
 <90299DA0-3131-4272-B918-8C8975080B2F@electricdruid.net>
 <CAGn5V-8BSdC7hNvDKNZZ5mHhJZYxs8LnWWVsoX7V0q83YZtHrQ@mail.gmail.com>
 <DC6B6E60-1001-4F60-8C96-2E7460F1242A@electricdruid.net>
 <CAGn5V-8iQ1=jiLVRH2tbnuTiMYXn3P_qnPYioUj4NTOVnXRQ=w@mail.gmail.com>
 <99886D4D-6092-424E-93D7-42AE09238D5F@electricdruid.net>
 <CAEfLrHH1kkNpqEcR4dYhjQLDTN3+UKiA_rvFWmFWukU1VjpHqQ@mail.gmail.com>
 <5e10adec-932d-6ebc-9d60-2812547b5277@go2.pl>
 <CALfiFhB_usXytXfqVRJtoeXr5WkSjJDZe06js2B43J13QkaDsg@mail.gmail.com>
 <CWLP265MB7132213AC61EA425C3CC0327DB8FA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
 <CWLP265MB7132AD93488B0E965F56B984DB8CA@CWLP265MB7132.GBRP265.PROD.OUTLOOK.COM>
Message-ID: <17c8ce31-e26c-4837-99af-44ff2ed9edcf@app.fastmail.com>

Thanks for sharing. Shall watch tonight.

I saw a snippet of an interview with Tim Cook recently where he said Apple couldn't build its products in the USA *for any price* because the large-scale manufacturing expertise ? people who know how to build & maintain factory tooling ? is largely gone, whereas in China it's readily available/accessible

This seems a rather difficult situation to recover from. How can you even teach it if the remaining experts are rapidly disappearing? How can you even get enough people interested in that career path when ~nobody knows anyone (locally) that does it?

John

On Fri, 15 Dec 2023, at 00:13, Mike Bryant wrote:
> I've got all my established contacts and find them excellent, but I still see comments here obviously not trusting Chinese suppliers and paying over the odds instead to suppliers who probably get their supplies from China anyway.   
> 
> Even if you don't buy the book, it's well worth watching this video just to appreciate the scale of the Shenzhen market and how it totally dwarfs anything in the West.  There's also huge warehouses backing up these operations which she doesn't show, and of course all the PCB manufacturers and assemblers.
> 
> https://www.crowdsupply.com/machinery-enchantress/the-new-essential-guide-to-electronics-in-shenzhen
> 
> In over 20 years of buying thousands of packages from China, I've had one faulty set of ICs due to bad packaging, and two counterfeits.  All three refunded.
> 
> 
> 
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
> 
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From ben at stuyts.nl  Sat Dec 16 19:29:45 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Sat, 16 Dec 2023 19:29:45 +0100
Subject: [sdiy] [ADMIN] Forwarding of messages
In-Reply-To: <07AA0857-042C-41BB-A9A0-668D3E9A560E@stuyts.nl>
References: <07AA0857-042C-41BB-A9A0-668D3E9A560E@stuyts.nl>
Message-ID: <F0B4661D-328F-44EE-8EA8-C42BBD0242C7@stuyts.nl>

Just a test, please ignore? or not. :-)

> On 9 Dec 2023, at 17:44, Ben Stuyts <ben at stuyts.nl> wrote:
> 
> [snip]
> 



From maxrest at gmx.de  Wed Dec 20 08:42:27 2023
From: maxrest at gmx.de (Maximilian Rest)
Date: Wed, 20 Dec 2023 08:42:27 +0100
Subject: [sdiy] Help programming STM32 in the US
Message-ID: <bac81513-2e81-4491-b692-c65c07c34c25@gmx.de>

Dear List,

my name is Max and I previously ran E-RM, the makers of the multiclock.
We have closed shop, but a customer from LA has reached out to me with a
repair request which is beyond their abilities.

They need help with flashing an STM32 microcontroller with the
respective USB programmer. They have board and programmer already at
their place, but can not complete the
programming routine.

Would any one of you be able so help out here, if they send you the
board and programmer?

All my best,
Max




From list at mikebeauchamp.com  Wed Dec 27 06:56:26 2023
From: list at mikebeauchamp.com (Mike Beauchamp)
Date: Wed, 27 Dec 2023 00:56:26 -0500
Subject: [sdiy] JLCPCB now lets you ship them parts
Message-ID: <9073734b-461d-4ff2-88cd-fbcf309b24c7@mikebeauchamp.com>

It seems like JLC has recently added a "consignment parts" section that 
allows you to ship them parts. I haven't done it and shipped from Canada 
to China has been a very expensive 50/50 gamble for me, but this might 
be handy for people.

https://jlcpcb.com/help/article/245-How-to-consign-parts-to-JLCPCB

Let us know how it went if you use the service. I've had them source 
parts from Mouser before, went smooth with no issues.

Mike


From jesse.weideman at gmail.com  Wed Dec 27 07:05:35 2023
From: jesse.weideman at gmail.com (Jesse Weideman)
Date: Tue, 26 Dec 2023 22:05:35 -0800
Subject: [sdiy] JLCPCB now lets you ship them parts
In-Reply-To: <9073734b-461d-4ff2-88cd-fbcf309b24c7@mikebeauchamp.com>
References: <9073734b-461d-4ff2-88cd-fbcf309b24c7@mikebeauchamp.com>
Message-ID: <CAM-CXxq_NCLdoaG4E3kY=Po_iqD0Nbgyw-CDVKV6NN2Qn=dy6w@mail.gmail.com>

Amazing! They offered it only to Mainland China return addresses, we were
thinking of getting a reshipper to pull it off. Thanks for the heads up.

I'll be trying it out in the next few days, will report back.



On Tue, Dec 26, 2023, 9:59 PM Mike Beauchamp <list at mikebeauchamp.com> wrote:

> It seems like JLC has recently added a "consignment parts" section that
> allows you to ship them parts. I haven't done it and shipped from Canada
> to China has been a very expensive 50/50 gamble for me, but this might
> be handy for people.
>
> https://jlcpcb.com/help/article/245-How-to-consign-parts-to-JLCPCB
>
> Let us know how it went if you use the service. I've had them source
> parts from Mouser before, went smooth with no issues.
>
> Mike
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From brianw at audiobanshee.com  Wed Dec 27 23:52:55 2023
From: brianw at audiobanshee.com (brianw)
Date: Wed, 27 Dec 2023 14:52:55 -0800
Subject: [sdiy] JLCPCB now lets you ship them parts
In-Reply-To: <9073734b-461d-4ff2-88cd-fbcf309b24c7@mikebeauchamp.com>
References: <9073734b-461d-4ff2-88cd-fbcf309b24c7@mikebeauchamp.com>
Message-ID: <672BEBC0-1976-4118-A8A9-A8D9E1ECCE34@audiobanshee.com>

I assume that the way this works best is to ship directly from the component manufacturers to JLCPCB, i.e. from China to China, and then only the final product gets shipped to Canada.

Then again, if you have vintage analog synth chips that are no longer available, then there's no Chinese manufacturer available.

I'm lucky to live in the Seattle area, where there are multiple PCB fab houses as well as multiple assembly shops. The labor is more expensive, but for small runs of boutique products, it's way easier to just get a local quote and hand-deliver the components. Seattle has Boeing, Mackie, Rane, Audio Control, and several other electronics manufacturers, which explains the local options. I've even seen Tesla Motors and SpaceX prototypes in the lobby of these Seattle-area businesses, so it seems their customers come from as far away as California. My point is that if you have unique components in Canada that aren't available in China, then you might be better off looking for Canadian or just-over-the-border in the US assembly shops.

Granted, labor rates are higher in America, but that might be compensated by the fact that you shouldn't lose components to questionable international shipping practices.

Brian


On Dec 26, 2023, at 9:56 PM, Mike Beauchamp <list at mikebeauchamp.com> wrote:
> It seems like JLC has recently added a "consignment parts" section that allows you to ship them parts. I haven't done it and shipped from Canada to China has been a very expensive 50/50 gamble for me, but this might be handy for people.
> 
> https://jlcpcb.com/help/article/245-How-to-consign-parts-to-JLCPCB
> 
> Let us know how it went if you use the service. I've had them source parts from Mouser before, went smooth with no issues.
> 
> Mike




From David.Geretschlaeger at gmx.at  Thu Dec 28 11:57:45 2023
From: David.Geretschlaeger at gmx.at (=?UTF-8?Q?David_Geretschl=C3=A4ger?=)
Date: Thu, 28 Dec 2023 11:57:45 +0100
Subject: [sdiy] disgusting sticky rubber wheels solution found
Message-ID: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>

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From mr at analogue.org  Thu Dec 28 12:14:52 2023
From: mr at analogue.org (Mattias Rickardsson)
Date: Thu, 28 Dec 2023 12:14:52 +0100
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
Message-ID: <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>

Interesting, thanks for sharing the advice.

Is there any knowledge of what's causing this stickiness? It doesn't happen
to every unit in a similar way.

Somehow it seems like sunlight could be one cause, gear sitting unused
possibly another, and also possibly lack of ventilation (gear stowed away
in storage/boxes/plastic bags). Perhaps also grease/dirt from earlier use.
But are there some facts? :-)

/mr


Den tors 28 dec. 2023 11:58David Geretschl?ger via Synth-diy <
synth-diy at synth-diy.org> skrev:

> Hi list,
> this is my first post here although i'm lurking for years. Don' t know if
> it' s of any interest but i had a real breakthrough in cleaning disgusting
> sticky rubber. It was so bad on my moog sub 37 that when i touched a wheel
> and then the keyboard again, i got stuck on the key and there was black
> residue on the (yellow tarnished, but thats another story) key.
>
> My solution is: a MICROFIBRE cleaning cloth (the thicker ones, noth the
> thin ones for glasses, displays etc) in Combination with 3 parts water and
> one part [vinegar acid 25%] the vinegar concentrate is available in every
> supermarket here in europe.
>
> Just rub firmly and the goo goes away. The Wheels are like new.
> Well, maybe they don't have the old rubber grip but they are more like
> soft plastic now, but don't slip under the finger.
>
> Also hat success in advance on my minibrute side panels, my midi
> contollers, and other sticky houshoule articles. The Cloth is lost i'm
> afraid, it doesn't seem to become clean after laundry.
>
> I'm sorry if that's already an old trick, but i was so amazed that i
> wanted to share it.
>
> All the best from Austria
> David Geretschl?ger
> --
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From tom at electricdruid.net  Thu Dec 28 12:19:02 2023
From: tom at electricdruid.net (Tom Wiltshire)
Date: Thu, 28 Dec 2023 11:19:02 +0000
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
Message-ID: <F57C992D-43DA-48A3-9C5C-4F126C5A7FE6@electricdruid.net>

Thanks David. I was recently trying to clean the sticky goo off my Zoom H4 handheld recorder, so I'll give this a go.

Tom


> On 28 Dec 2023, at 10:57, David Geretschl?ger via Synth-diy <synth-diy at synth-diy.org> wrote:
> 
> Hi list,
> this is my first post here although i'm lurking for years. Don' t know if it' s of any interest but i had a real breakthrough in cleaning disgusting sticky rubber. It was so bad on my moog sub 37 that when i touched a wheel and then the keyboard again, i got stuck on the key and there was black residue on the (yellow tarnished, but thats another story) key.
> 
> My solution is: a MICROFIBRE cleaning cloth (the thicker ones, noth the thin ones for glasses, displays etc) in Combination with 3 parts water and one part [vinegar acid 25%] the vinegar concentrate is available in every supermarket here in europe. 
> 
> Just rub firmly and the goo goes away. The Wheels are like new. 
> Well, maybe they don't have the old rubber grip but they are more like soft plastic now, but don't slip under the finger.
> 
> Also hat success in advance on my minibrute side panels, my midi contollers, and other sticky houshoule articles. The Cloth is lost i'm afraid, it doesn't seem to become clean after laundry.
> 
> I'm sorry if that's already an old trick, but i was so amazed that i wanted to share it.
> 
> All the best from Austria
> David Geretschl?ger 
> --
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org




From fanwander at mnet-online.de  Thu Dec 28 13:51:20 2023
From: fanwander at mnet-online.de (Florian Anwander)
Date: Thu, 28 Dec 2023 13:51:20 +0100
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
 <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
Message-ID: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>

I talked to someone who is doing enclosure manufacturing, and he said, 
that basically the idea of using those soft plastics isn't good. Those 
materials require so called plasticizers (softeners). These diffuse 
towards the surface at room temperature, where they then evaporate - 
normally. If the material is not ventilated, the plasticizers dissolve 
the top layer of the plastic quite quickly, which then becomes sticky. 
If the material can ventilate, it becomes brittle and fragile. Neither 
is a good option.


Am 28.12.23 um 12:14 schrieb Mattias Rickardsson:
> Is there any knowledge of what's causing this stickiness? It doesn't 
> happen to every unit in a similar way.
>
> Somehow it seems like sunlight could be one cause, gear sitting unused 
> possibly another, and also possibly lack of ventilation (gear stowed 
> away in storage/boxes/plastic bags). Perhaps also grease/dirt from 
> earlier use. But are there some facts? :-)
>
> /mr
>
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From tprotopgr at gmail.com  Thu Dec 28 14:00:48 2023
From: tprotopgr at gmail.com (t_p)
Date: Thu, 28 Dec 2023 15:00:48 +0200
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
 <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
 <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
Message-ID: <CAKfKu2TMm6204A9hPE=MzCE8zDUAJcfLLWT4Kczh+8b0B9cM2g@mail.gmail.com>

I used IPA (not the beer) and it worked miracles!

On Thu, Dec 28, 2023, 14:55 Florian Anwander <fanwander at mnet-online.de>
wrote:

> I talked to someone who is doing enclosure manufacturing, and he said,
> that basically the idea of using those soft plastics isn't good. Those
> materials require so called plasticizers (softeners). These diffuse towards
> the surface at room temperature, where they then evaporate - normally. If
> the material is not ventilated, the plasticizers dissolve the top layer of
> the plastic quite quickly, which then becomes sticky. If the material can
> ventilate, it becomes brittle and fragile. Neither is a good option.
>
>
> Am 28.12.23 um 12:14 schrieb Mattias Rickardsson:
>
> Is there any knowledge of what's causing this stickiness? It doesn't
> happen to every unit in a similar way.
>
> Somehow it seems like sunlight could be one cause, gear sitting unused
> possibly another, and also possibly lack of ventilation (gear stowed away
> in storage/boxes/plastic bags). Perhaps also grease/dirt from earlier use.
> But are there some facts? :-)
>
> /mr
>
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org
>
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From btremblay at me.com  Thu Dec 28 15:21:46 2023
From: btremblay at me.com (Benjamin Tremblay)
Date: Thu, 28 Dec 2023 09:21:46 -0500
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
References: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
Message-ID: <86D24807-13C4-4CC8-8CA5-126224F0AB39@me.com>

I cannot buy concentrated vinegar here in the USA but yes, this approach is similar to a problem I had with m-audio control wheels and elbow grease with a chamois is effective. 
Benjamin Tremblay

> On Dec 28, 2023, at 7:59?AM, Florian Anwander <fanwander at mnet-online.de> wrote:
> 
> ?
> I talked to someone who is doing enclosure manufacturing, and he said, that basically the idea of using those soft plastics isn't good. Those materials require so called plasticizers (softeners). These diffuse towards the surface at room temperature, where they then evaporate - normally. If the material is not ventilated, the plasticizers dissolve the top layer of the plastic quite quickly, which then becomes sticky. If the material can ventilate, it becomes brittle and fragile. Neither is a good option.
> 
> 
>> Am 28.12.23 um 12:14 schrieb Mattias Rickardsson:
>> Is there any knowledge of what's causing this stickiness? It doesn't happen to every unit in a similar way. 
>> 
>> Somehow it seems like sunlight could be one cause, gear sitting unused possibly another, and also possibly lack of ventilation (gear stowed away in storage/boxes/plastic bags). Perhaps also grease/dirt from earlier use. But are there some facts? :-)
>> 
>> /mr
>> 
> 
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From obl64 at ix.netcom.com  Thu Dec 28 16:30:31 2023
From: obl64 at ix.netcom.com (Oren Leavitt)
Date: Thu, 28 Dec 2023 09:30:31 -0600
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
Message-ID: <652ccb51-1843-47ac-b2c9-95f984c5481e@ix.netcom.com>

I'll have to try that. I have some bottles of 99% pure acetic acid handy 
that I can dilute to desired strength.

Thanks for the soft plastic "sticky goo time bomb" solution.

- Oren

On 12/28/23 4:57 AM, David Geretschl?ger via Synth-diy wrote:
> Hi list,
> this is my first post here although i'm lurking for years. Don' t know 
> if it' s of any interest but i had a real breakthrough in cleaning 
> disgusting sticky rubber. It was so bad on my moog sub 37 that when i 
> touched a wheel and then the keyboard again, i got stuck on the key 
> and there was black residue on the (yellow tarnished, but thats 
> another story) key.
>
> My solution is: a MICROFIBRE cleaning cloth (the thicker ones, noth 
> the thin ones for glasses, displays etc) in Combination with 3 parts 
> water and one part [vinegar acid 25%] the vinegar concentrate is 
> available in every supermarket here in europe.
>
> Just rub firmly and the goo goes away. The Wheels are like new.
> Well, maybe they don't have the old rubber grip but they are more like 
> soft plastic now, but don't slip under the finger.
>
> Also hat success in advance on my minibrute side panels, my midi 
> contollers, and other sticky houshoule articles. The Cloth is lost i'm 
> afraid, it doesn't seem to become clean after laundry.
>
> I'm sorry if that's already an old trick, but i was so amazed that i 
> wanted to share it.
>
> All the best from Austria
> David Geretschl?ger
> -- 
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org


From ben at stuyts.nl  Thu Dec 28 18:26:06 2023
From: ben at stuyts.nl (Ben Stuyts)
Date: Thu, 28 Dec 2023 18:26:06 +0100
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
Message-ID: <AB91F204-5F0C-4C42-A0AC-50EA21AA0739@stuyts.nl>

Hi David,

Thanks for the tip. I have the same problem with my Sub-37 and years ago I talked to Moog support about it. It was a known problem and they said they would perhaps manufacture sets of replacement wheels 'in the near future' made of a different material. But that never came to be (and now definitely never will be).

I also have a Subsequent 37 CV and its wheels are fine. So the Sub 37 is waiting in the pile of projects. I?ll try your solution.

Ben


> On 28 Dec 2023, at 11:57, David Geretschl?ger via Synth-diy <synth-diy at synth-diy.org> wrote:
> 
> Hi list,
> this is my first post here although i'm lurking for years. Don' t know if it' s of any interest but i had a real breakthrough in cleaning disgusting sticky rubber. It was so bad on my moog sub 37 that when i touched a wheel and then the keyboard again, i got stuck on the key and there was black residue on the (yellow tarnished, but thats another story) key.
> 
> My solution is: a MICROFIBRE cleaning cloth (the thicker ones, noth the thin ones for glasses, displays etc) in Combination with 3 parts water and one part [vinegar acid 25%] the vinegar concentrate is available in every supermarket here in europe. 
> 
> Just rub firmly and the goo goes away. The Wheels are like new. 
> Well, maybe they don't have the old rubber grip but they are more like soft plastic now, but don't slip under the finger.
> 
> Also hat success in advance on my minibrute side panels, my midi contollers, and other sticky houshoule articles. The Cloth is lost i'm afraid, it doesn't seem to become clean after laundry.
> 
> I'm sorry if that's already an old trick, but i was so amazed that i wanted to share it.
> 
> All the best from Austria
> David Geretschl?ger 
> --
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org




From cheater00social at gmail.com  Thu Dec 28 18:31:08 2023
From: cheater00social at gmail.com (cheater cheater)
Date: Thu, 28 Dec 2023 18:31:08 +0100
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <86D24807-13C4-4CC8-8CA5-126224F0AB39@me.com>
References: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
 <86D24807-13C4-4CC8-8CA5-126224F0AB39@me.com>
Message-ID: <CAGn5V-_ip3Cet5R9GEqSDfGAJKCNwmfQ1+9Y2f0MDwnAMOnA6A@mail.gmail.com>

> I cannot buy concentrated vinegar here in the USA

why not?

On Thu, Dec 28, 2023 at 3:26?PM Benjamin Tremblay via Synth-diy
<synth-diy at synth-diy.org> wrote:
>
> I cannot buy concentrated vinegar here in the USA but yes, this approach is similar to a problem I had with m-audio control wheels and elbow grease with a chamois is effective.
> Benjamin Tremblay
>
> > On Dec 28, 2023, at 7:59?AM, Florian Anwander <fanwander at mnet-online.de> wrote:
> >
> > ?
> > I talked to someone who is doing enclosure manufacturing, and he said, that basically the idea of using those soft plastics isn't good. Those materials require so called plasticizers (softeners). These diffuse towards the surface at room temperature, where they then evaporate - normally. If the material is not ventilated, the plasticizers dissolve the top layer of the plastic quite quickly, which then becomes sticky. If the material can ventilate, it becomes brittle and fragile. Neither is a good option.
> >
> >
> >> Am 28.12.23 um 12:14 schrieb Mattias Rickardsson:
> >> Is there any knowledge of what's causing this stickiness? It doesn't happen to every unit in a similar way.
> >>
> >> Somehow it seems like sunlight could be one cause, gear sitting unused possibly another, and also possibly lack of ventilation (gear stowed away in storage/boxes/plastic bags). Perhaps also grease/dirt from earlier use. But are there some facts? :-)
> >>
> >> /mr
> >>
> >
> > ________________________________________________________
> > This is the Synth-diy mailing list
> > Submit email to: Synth-diy at synth-diy.org
> > View archive at: https://synth-diy.org/pipermail/synth-diy/
> > Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org
> View archive at: https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org



From gjames at kddlab.com  Thu Dec 28 19:01:58 2023
From: gjames at kddlab.com (gjames at kddlab.com)
Date: Thu, 28 Dec 2023 13:01:58 -0500
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <CAGn5V-_ip3Cet5R9GEqSDfGAJKCNwmfQ1+9Y2f0MDwnAMOnA6A@mail.gmail.com>
References: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
 <86D24807-13C4-4CC8-8CA5-126224F0AB39@me.com>
 <CAGn5V-_ip3Cet5R9GEqSDfGAJKCNwmfQ1+9Y2f0MDwnAMOnA6A@mail.gmail.com>
Message-ID: <001f01da39b7$f4b5bb40$de2131c0$@kddlab.com>

Ben,

It's called "cleaning vinegar" here in the US. Other varieties can be bought that are food grade, but this is the cheapest. ~$20/gal.

Greg

-----Original Message-----
From: Synth-diy <synth-diy-bounces at synth-diy.org> On Behalf Of cheater cheater via Synth-diy
Sent: Thursday, December 28, 2023 12:31 PM
To: Benjamin Tremblay <btremblay at me.com>
Cc: Synth DIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] disgusting sticky rubber wheels solution found

> I cannot buy concentrated vinegar here in the USA

why not?

On Thu, Dec 28, 2023 at 3:26?PM Benjamin Tremblay via Synth-diy <synth-diy at synth-diy.org> wrote:
>
> I cannot buy concentrated vinegar here in the USA but yes, this approach is similar to a problem I had with m-audio control wheels and elbow grease with a chamois is effective.
> Benjamin Tremblay
>
> > On Dec 28, 2023, at 7:59?AM, Florian Anwander <fanwander at mnet-online.de> wrote:
> >
> > ?
> > I talked to someone who is doing enclosure manufacturing, and he said, that basically the idea of using those soft plastics isn't good. Those materials require so called plasticizers (softeners). These diffuse towards the surface at room temperature, where they then evaporate - normally. If the material is not ventilated, the plasticizers dissolve the top layer of the plastic quite quickly, which then becomes sticky. If the material can ventilate, it becomes brittle and fragile. Neither is a good option.
> >
> >
> >> Am 28.12.23 um 12:14 schrieb Mattias Rickardsson:
> >> Is there any knowledge of what's causing this stickiness? It doesn't happen to every unit in a similar way.
> >>
> >> Somehow it seems like sunlight could be one cause, gear sitting 
> >> unused possibly another, and also possibly lack of ventilation 
> >> (gear stowed away in storage/boxes/plastic bags). Perhaps also 
> >> grease/dirt from earlier use. But are there some facts? :-)
> >>
> >> /mr
> >>
> >
> > ________________________________________________________
> > This is the Synth-diy mailing list
> > Submit email to: Synth-diy at synth-diy.org View archive at: 
> > https://synth-diy.org/pipermail/synth-diy/
> > Check your settings at: 
> > https://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org View archive at: 
> https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: 
> https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org

________________________________________________________
This is the Synth-diy mailing list
Submit email to: Synth-diy at synth-diy.org View archive at: https://synth-diy.org/pipermail/synth-diy/
Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
Selling or trading? Use marketplace at synth-diy.org




From thescum at surfree.com  Thu Dec 28 19:02:55 2023
From: thescum at surfree.com (Byron G. Jacquot)
Date: Thu, 28 Dec 2023 18:02:55 +0000
Subject: [sdiy] disgusting sticky rubber wheels solution found
Message-ID: <3cfebc91-3193-49d9-e37e-09645faa219a@surfree.com>

> I cannot buy concentrated vinegar here in the USA

Sure you can.  $22 a gallon at the big box home improvement stores. 

I'm going to have to try this on the end caps of my Sub Phatty.  The wheels are OK, but the sticky cheeks make the thing unplayable.

-Byron Jacquot




From gjames at kddlab.com  Thu Dec 28 20:31:48 2023
From: gjames at kddlab.com (gjames at kddlab.com)
Date: Thu, 28 Dec 2023 14:31:48 -0500
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <001f01da39b7$f4b5bb40$de2131c0$@kddlab.com>
References: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
 <86D24807-13C4-4CC8-8CA5-126224F0AB39@me.com>
 <CAGn5V-_ip3Cet5R9GEqSDfGAJKCNwmfQ1+9Y2f0MDwnAMOnA6A@mail.gmail.com>
 <001f01da39b7$f4b5bb40$de2131c0$@kddlab.com>
Message-ID: <000601da39c4$80da14c0$828e3e40$@kddlab.com>

FS: Vintage analog cult synth - kept in a smoke, animal, salad dressing free studio...

-----Original Message-----
From: Synth-diy <synth-diy-bounces at synth-diy.org> On Behalf Of gjames at kddlab.com
Sent: Thursday, December 28, 2023 1:02 PM
To: 'cheater cheater' <cheater00social at gmail.com>; 'Benjamin Tremblay' <btremblay at me.com>
Cc: 'Synth DIY' <synth-diy at synth-diy.org>
Subject: Re: [sdiy] disgusting sticky rubber wheels solution found

Ben,

It's called "cleaning vinegar" here in the US. Other varieties can be bought that are food grade, but this is the cheapest. ~$20/gal.

Greg

-----Original Message-----
From: Synth-diy <synth-diy-bounces at synth-diy.org> On Behalf Of cheater cheater via Synth-diy
Sent: Thursday, December 28, 2023 12:31 PM
To: Benjamin Tremblay <btremblay at me.com>
Cc: Synth DIY <synth-diy at synth-diy.org>
Subject: Re: [sdiy] disgusting sticky rubber wheels solution found

> I cannot buy concentrated vinegar here in the USA

why not?

On Thu, Dec 28, 2023 at 3:26?PM Benjamin Tremblay via Synth-diy <synth-diy at synth-diy.org> wrote:
>
> I cannot buy concentrated vinegar here in the USA but yes, this approach is similar to a problem I had with m-audio control wheels and elbow grease with a chamois is effective.
> Benjamin Tremblay
>
> > On Dec 28, 2023, at 7:59?AM, Florian Anwander <fanwander at mnet-online.de> wrote:
> >
> > ?
> > I talked to someone who is doing enclosure manufacturing, and he said, that basically the idea of using those soft plastics isn't good. Those materials require so called plasticizers (softeners). These diffuse towards the surface at room temperature, where they then evaporate - normally. If the material is not ventilated, the plasticizers dissolve the top layer of the plastic quite quickly, which then becomes sticky. If the material can ventilate, it becomes brittle and fragile. Neither is a good option.
> >
> >
> >> Am 28.12.23 um 12:14 schrieb Mattias Rickardsson:
> >> Is there any knowledge of what's causing this stickiness? It doesn't happen to every unit in a similar way.
> >>
> >> Somehow it seems like sunlight could be one cause, gear sitting 
> >> unused possibly another, and also possibly lack of ventilation 
> >> (gear stowed away in storage/boxes/plastic bags). Perhaps also 
> >> grease/dirt from earlier use. But are there some facts? :-)
> >>
> >> /mr
> >>
> >
> > ________________________________________________________
> > This is the Synth-diy mailing list
> > Submit email to: Synth-diy at synth-diy.org View archive at: 
> > https://synth-diy.org/pipermail/synth-diy/
> > Check your settings at: 
> > https://synth-diy.org/mailman/listinfo/synth-diy
> > Selling or trading? Use marketplace at synth-diy.org
>
> ________________________________________________________
> This is the Synth-diy mailing list
> Submit email to: Synth-diy at synth-diy.org View archive at: 
> https://synth-diy.org/pipermail/synth-diy/
> Check your settings at: 
> https://synth-diy.org/mailman/listinfo/synth-diy
> Selling or trading? Use marketplace at synth-diy.org

________________________________________________________
This is the Synth-diy mailing list
Submit email to: Synth-diy at synth-diy.org View archive at: https://synth-diy.org/pipermail/synth-diy/
Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
Selling or trading? Use marketplace at synth-diy.org


________________________________________________________
This is the Synth-diy mailing list
Submit email to: Synth-diy at synth-diy.org View archive at: https://synth-diy.org/pipermail/synth-diy/
Check your settings at: https://synth-diy.org/mailman/listinfo/synth-diy
Selling or trading? Use marketplace at synth-diy.org




From ka4hjh at gmail.com  Thu Dec 28 20:57:23 2023
From: ka4hjh at gmail.com (Terry Bowman)
Date: Thu, 28 Dec 2023 14:57:23 -0500
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
 <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
 <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
Message-ID: <B500D869-8411-401B-9586-EDFDD981FD36@gmail.com>


> On Dec 28, 2023, at 7:51 AM, Florian Anwander <fanwander at mnet-online.de> wrote:
> 
> Those materials require so called plasticizers (softeners). These diffuse towards the surface at room temperature, where they then evaporate - normally. If the material is not ventilated, the plasticizers dissolve the top layer of the plastic quite quickly, which then becomes sticky. If the material can ventilate, it becomes brittle and fragile. Neither is a good option.

Plasticizer (or elasticizer) is required for PVC, which is quite hard without it. I collect old Christmas lights and I've seen vinyl AC cords that have turned into plastic rock. Cracked all along the length of it like a mudflat in the dry season. Christmas light wires these days use lead which makes them very flexible. I've never seen lead "dry out" but then you have to wash your hands before you stick a finger in your mouth?in California, anyway. 

"New car smell" is the elasticizer in the vinyl. 


Terry Bowman, KA4HJH
"The Mac Doctor"

https://www.astarcloseup.com

"If only you could see what I've seen with your eyes."?Roy Batty, Blade Runner

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From David.Geretschlaeger at gmx.at  Thu Dec 28 23:53:05 2023
From: David.Geretschlaeger at gmx.at (=?UTF-8?Q?David_Geretschl=C3=A4ger?=)
Date: Thu, 28 Dec 2023 23:53:05 +0100
Subject: [sdiy]
 =?utf-8?q?Re=3A__disgusting_sticky_rubber_wheels_solution?=
 =?utf-8?q?_found?=
Message-ID: <trinity-cd062ab2-e767-4081-af44-bd6d72363f22-1703803985480@msvc-mesg-gmx025>

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From igg.debus at gmail.com  Fri Dec 29 11:09:34 2023
From: igg.debus at gmail.com (Ingo Debus)
Date: Fri, 29 Dec 2023 11:09:34 +0100
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
Message-ID: <4A7F2973-B5BC-4D6F-BC86-80C4D3F56952@gmail.com>



> Am 28.12.2023 um 11:57 schrieb David Geretschl?ger via Synth-diy <synth-diy at synth-diy.org>:
> 
> Don' t know if it' s of any interest but i had a real breakthrough in cleaning disgusting sticky rubber.

Here?s a different method, using ?orange oil cleaner?:
https://youtu.be/Vsk5-juBWpo?si=WGBVwTLruFt8iGln <https://youtu.be/Vsk5-juBWpo?si=WGBVwTLruFt8iGln>

The video is in German, but YouTube allows you to display English subtitles (click on the cogwheel).

Re vinegar, I?ve had very good results removing old wood glue with vinegar concentrate.

Ingo
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From rainer at buchty.net  Fri Dec 29 15:30:37 2023
From: rainer at buchty.net (Rainer Buchty)
Date: Fri, 29 Dec 2023 15:30:37 +0100 (CET)
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <CAKfKu2TMm6204A9hPE=MzCE8zDUAJcfLLWT4Kczh+8b0B9cM2g@mail.gmail.com>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
 <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
 <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
 <CAKfKu2TMm6204A9hPE=MzCE8zDUAJcfLLWT4Kczh+8b0B9cM2g@mail.gmail.com>
Message-ID: <8f74f877-0a39-46ab-23e0-c365bc5a3003@buchty.net>

On Thu, 28 Dec 2023, t_p via Synth-diy wrote:

> I used IPA (not the beer) and it worked miracles!

Seconding this.

If it's a flat surface, I scrub off the goo with an old plastic (debit, 
credit, ...) card and then go for the final cleaning round using paper 
towels and, where required, a soft toothbrush.

Much easier that way than going through several rounds of paper towels.

Luckily, so far I only had two candidates that required this treatment, 
some later Dell Latitude and an illuminated Logitech keyboard. In both 
cases, the "soft lacquer" (or whatever it is officially called) used on 
the handrest parts (and in case of the Dell also the top bar covering 
the LEDs) turned to sticky goo.

(Never tried acetic acid for that, but my gut feeling from using it as a 
decalcifyer for kitchen and bathroom cleaning is that the smell sticks 
around longer than the "technical" and IMO more tolerable IPA smell. But 
that's personal preference, I guess.)

Rainer



From Peter.Ullrich at kapsch.net  Fri Dec 29 17:44:16 2023
From: Peter.Ullrich at kapsch.net (Ullrich Peter)
Date: Fri, 29 Dec 2023 16:44:16 +0000
Subject: [sdiy] disgusting sticky rubber wheels solution found
In-Reply-To: <8f74f877-0a39-46ab-23e0-c365bc5a3003@buchty.net>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
 <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
 <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
 <CAKfKu2TMm6204A9hPE=MzCE8zDUAJcfLLWT4Kczh+8b0B9cM2g@mail.gmail.com>
 <8f74f877-0a39-46ab-23e0-c365bc5a3003@buchty.net>
Message-ID: <AS8PR03MB83212107E1B3D8A9428D959D949DA@AS8PR03MB8321.eurprd03.prod.outlook.com>

I found different types of sticky surfaces - and different solutions:


  *   some can be removed by rubbing with IPA and towel
  *   The Arturia Microbrute knobs for example didn't work with IPA, here I found a tip on the web that soda and a little bit of water works fine. And it worked like a charm!
  *   other units didn't work with any of the above - then I used a clear spray paint - this fixed the sticky surface and made a new harder surface - works for at least 10 years, lets see if it will be sticky in a few years...

Ciao
Peter
________________________________
Von: Synth-diy <synth-diy-bounces at synth-diy.org> im Auftrag von Rainer Buchty <rainer at buchty.net>
Gesendet: Freitag, 29. Dezember 2023 15:30
An: Synth DIY <synth-diy at synth-diy.org>
Betreff: *EXT* Re: [sdiy] disgusting sticky rubber wheels solution found

On Thu, 28 Dec 2023, t_p via Synth-diy wrote:

> I used IPA (not the beer) and it worked miracles!

Seconding this.

If it's a flat surface, I scrub off the goo with an old plastic (debit,
credit, ...) card and then go for the final cleaning round using paper
towels and, where required, a soft toothbrush.

Much easier that way than going through several rounds of paper towels.

Luckily, so far I only had two candidates that required this treatment,
some later Dell Latitude and an illuminated Logitech keyboard. In both
cases, the "soft lacquer" (or whatever it is officially called) used on
the handrest parts (and in case of the Dell also the top bar covering
the LEDs) turned to sticky goo.

(Never tried acetic acid for that, but my gut feeling from using it as a
decalcifyer for kitchen and bathroom cleaning is that the smell sticks
around longer than the "technical" and IMO more tolerable IPA smell. But
that's personal preference, I guess.)

Rainer

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From gjames at kddlab.com  Sun Dec 31 23:17:57 2023
From: gjames at kddlab.com (gjames at kddlab.com)
Date: Sun, 31 Dec 2023 17:17:57 -0500
Subject: [sdiy] Roland MKS-80 servicing
In-Reply-To: <AS8PR03MB83212107E1B3D8A9428D959D949DA@AS8PR03MB8321.eurprd03.prod.outlook.com>
References: <trinity-fda60cbc-88c4-4087-8ab4-3975ea4cc0e8-1703761065365@msvc-mesg-gmx001>
 <CAP92RBXyREhUhFiv-KoTm+HuRgptFR+Gn2Qr9+G2RWJ-WJRYdw@mail.gmail.com>
 <24e9f32c-93a9-47ce-a4e2-bc40b35ee9ab@mnet-online.de>
 <CAKfKu2TMm6204A9hPE=MzCE8zDUAJcfLLWT4Kczh+8b0B9cM2g@mail.gmail.com>
 <8f74f877-0a39-46ab-23e0-c365bc5a3003@buchty.net>
 <AS8PR03MB83212107E1B3D8A9428D959D949DA@AS8PR03MB8321.eurprd03.prod.outlook.com>
Message-ID: <003201da3c37$35fc83a0$a1f58ae0$@kddlab.com>

Can anyone out here make a recommendation for having my MKS-80 serviced in
the US?

 

TIA and Happy New Year,

Greg

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