AVR-Chat

--- In AVR-Chat@yahoogroups.com, "David VanHorn" <microbrix@...> 
wrote:
> Maybe I'm missing something here, but what's the point of "almost
> always having 0 in R1"
In a word, history.  The avr-gcc register assumptions were defined 
before the advent of the AVR MUL instruction which produces its 
result, unfortunately, in r1:r0.  That means that if an interrupt 
occurs immediately after a MUL instruction, r1 may not be zero.

It is true, of course, that the avr-gcc register assumptions could 
be changed to allocate r2, for example, to be the "zero register".  
This would be a painful change because it would break all existing 
code.  At first blush, you might think "yes, but all you would need 
to do is recompile your code."  While that is true for C code, any 
assembly language code intended to work with C code would need to be 
manually inspected and modified.

> That seems like a trivial thing to fix.
Perhaps.  I've never looked at the source code for the avr-gcc code 
generator.  I suspect that it is more difficult than it at first 
appears otherwise it would already have been done.  It may also be 
that even though it might be relative simple to correct, other 
changes are deemed to be higher priority.  In any event, you can 
always get the source code and fix it yourself if it is important to 
you.

I suspect that the general consensus is that if you have a need for 
an extremely efficient ISR (or any function for that matter), you 
can always code it completely in assembly language.  I have done 
this from time to time.  Using mixed C and assembly language gives 
you the "best of both worlds".   You get the benefits of using C for 
most of your application and, where it is needed, you get the 
benefit of highly tuned, hand-crafted assembly language code.

Don Kinzer
ZBasic Microcontrollers
http://www.zbasic.net