AVR-Chat

> With asm, you have to tediously study one great column of code before and
> after you do any chopping and pasting. HLLs have a 2D visual aspect to it.

It's certainly possible to write ASM as one huge tarball of cruft, but
that's not how I do it.

Here's an ISR that I just compiled with optimization set for smallest
code, in GCC:

// Timer 0 overflow ISR
ISR(TIMER0_OVF_vect)
{
     498:	1f 92       	push	r1
     49a:	0f 92       	push	r0
     49c:	0f b6       	in	r0, 0x3f	; 63
     49e:	0f 92       	push	r0
     4a0:	11 24       	eor	r1, r1
	ADCSRA |= (1<<ADSC);					// Start the next ADC conversion
     4a2:	36 9a       	sbi	0x06, 6	; 6
     4a4:	0f 90       	pop	r0
     4a6:	0f be       	out	0x3f, r0	; 63
     4a8:	0f 90       	pop	r0
     4aa:	1f 90       	pop	r1
     4ac:	18 95       	reti


Only TWO of those instructions are actually needed!
If it were me writing, it would look like this:

T0_OVF_ISR:
          sbi ADCSRA,(1<<ADSC)
          reti

Since SBI and CBI don't affect flags, and no registers are used,
nothing needs to be pushed or popped at all!
I'm still astounded that at this late date, this kind of thing happens.