AVR-Chat

On Thu, Jan 15, 2009 at 10:55:41AM -0500, David VanHorn wrote:
> > This is one of the reasons I don't trust architecture specific
> > keywords (interrupt keywords in particular).
> >
> > And also a good illustration of where mixing asm with C can be of
> > great benefit (reducing the latency substantially and decreasing
> > size to boot)
> 
> This is hilarious to me in several layers.
> 
> The most obvious one is the one I pointed out, NOTHING needs be
> pushed. Then we have the fact that ISRs aren't supposed to be able to
> count on R1 being zeroed, but the code DOES that.

Why not count on R1 being zeroed? If you read somewhere that its not
supposed to be then clearly you are reading old documentation. Welcome
to Open Source.

> Can't a modern compiler figure out that all this was unnecessary?

No doubt it could. But why sweat it?

IIRC it takes 4 or 5 cycles to to RTI, and and Joerg says at
http://www.nongnu.org/avr-libc/user-manual/group__asmdemo.html that
dispatch takes 4 cycles to setup and 2 to RJMP the vector. (Probably 3
for > 64K AVRs). The generated code was 11 instructions vs 2. So the
"big" difference is 20 (6 for IRQ call, 10 instructions, 4 RTI) cycles
vs 11.

Twice almost-zero is still almost zero. This is not a "substantial"
improvement as has been claimed.

Q: If one builds a million of these things, how many centuries would these
million have to run to save as much time as has already been wasted
talking about it?

A: Never. The time saved will be burned in a busy loop waiting on other
things.

-- 
David Kelly N4HHE, dkelly@HiWAAY.net
========================================================================
Whom computers would destroy, they must first drive mad.