AVR-Chat

Gentlemen,

Thanks for all the comments.  Kindly find my answer to all of the various questions here on top of Ivan's message.  

* It's the AVCC line that is tied to +5.  Not Vref.  So far, no magic smoke coming out.  

* Vref is tied to a variable ps for troubleshooting, but for the formal circuit, it would be tied to a 4.096v bandgap precision reference.

* 8 mhz clock via div/64 prescaler is 125 khz clock rate to the ADC - below the 200khz recommended.

* Setting the input selection via ADMUX = 64 or REFS0=1 provides no different result than ADXMUX=0/REFS0=0;  I can see the 

LST follows:

;attiny861 adc vref test.c,429 ::   for(;;){

L_main39:
;attiny861 adc vref test.c,432 ::   REFS0_bit=1;
0x0D1A 0xB1B7     IN         R27, REFS0_bit+0
0x0D1C 0x64B0     SBR        R27, 64
0x0D1E 0xB9B7     OUT        REFS0_bit+0, R27

;attiny861 adc vref test.c,433 ::   ADEN_bit = 1;                     // enable adc
0x0D20 0xB1B6     IN         R27, ADEN_bit+0
0x0D22 0x68B0     SBR        R27, 128
0x0D24 0xB9B6     OUT        ADEN_bit+0, R27

;attiny861 adc vref test.c,434 ::   ADSC_bit = 1;                     // start conversion
0x0D26 0xB1B6     IN         R27, ADSC_bit+0
0x0D28 0x64B0     SBR        R27, 64
0x0D2A 0xB9B6     OUT        ADSC_bit+0, R27

;attiny861 adc vref test.c,436 ::   while(adsc_bit);
L_main42:
0x0D2C 0xB1B6     IN         R27, ADSC_bit+0
0x0D2E 0xFFB6     SBRS       R27, 6
0x0D30 0xC001     RJMP       L_main43
0x0D32 0xCFFC     RJMP       L_main42

L_main43:
;attiny861 adc vref test.c,439 ::   lb=ADCL;                          // get lower byte
0x0D34 0xB104     IN         R16, ADCL+0
0x0D36 0x830B     STD        Y+3, R16

;attiny861 adc vref test.c,440 ::   ub=ADCH;                          // get upper byte
0x0D38 0xB105     IN         R16, ADCH+0
0x0D3A 0x830A     STD        Y+2, R16

;attiny861 adc vref test.c,441 ::   adc_rd0 = (256*ub) + lb;          // build number
0x0D3C 0x810A     LDD        R16, Y+2
0x0D3E 0x2F30     MOV        R19, R16
0x0D40 0x2722     CLR        R18
0x0D42 0x810B     LDD        R16, Y+3
0x0D44 0xE010     LDI        R17, 0
0x0D46 0x0F02     ADD        R16, R18
0x0D48 0x1F13     ADC        R17, R19
0x0D4A 0x8308     STD        Y+0, R16
0x0D4C 0x8319     STD        Y+1, R17


From: ivernot 
Sent: Friday, January 22, 2010 5:57 AM
To: AVR-Chat@yahoogroups.com 
Subject: [AVR-Chat] Re: Vref on ATTiny861a


  


Hi Jeff,
I am not familiar with the MakroC complier (by your code smippet it seems that one can set things at a bit level rather than having to write the entire register - interesting...)

A few things to note -
1. What happens to the bits that you are not explicitly setting? We assume they are zero - but are they _really_??
2. Are you select the correct ADC channel you are reading from? (ADMUX bits)
3. Did you setup the ADC clock? (ADPS bits)

Can you look at the generated asm to check that the registers are written as you'd expect?

Below is code I use to init the adc on an ATMega128. HTH

Please let us know how you get on.
Regards,
Ivan Vernot

void ADC_Init(BOOL use_internal_ref )
{
ADMUX = 0; // Sel Ch0
if(use_internal_ref)
{ // use VCC as reference
ADMUX = BIT(REFS0); // 01xx xxxx; AVCC as ref
// NB: ;'use internal' does not mean use 
// ACTUAL internal 2.56 V ref 
// it means use AVCC are the reference (5V)
}
else
{ // use external reference
ADMUX &= ~(BIT(REFS1)|BIT(REFS0)); 
// 00xx xxxx ; AREF as ref
}
// ADMUX |= BIT(ADLAR); // xx1x xxxx; Left Adjust results

ADCSRA = BIT(ADEN) | BIT(ADPS2)|BIT(ADPS1)|BIT(ADPS0); 
// Enable ADC in single shot mode
// ADSP2:0 110 => clk/64 => 14MHz/64 = 230Khz ADC clk)
// ADSP2:0 111 => clk/128 => 14MHz/128 = 115.2Khz ADC clk)

// SFIOR = BIT(ADHSM); // ADC High Speed Mode
ADCSRA |= BIT(ADSC); // Start the first conversion

// initiate dummy conversion
while (ADCSRA & BIT(ADSC))
{
WATCHDOG(); // Wait until coversion completed
}
}

--- In AVR-Chat@yahoogroups.com, "Jeff Blaine AC0C" <keepwalking188@...> wrote:
>
> I am having a tough time getting this chip to respond to any other ADC voltage reference than the default AVcc.
> 
> The code snip is really simple... Below, using the MakroC Pro compiler, however the results seem to be the same if I do the same using ASM instructions instead of their bit-level defines.
> 
> I must be overlooking something. It seems so simple, driving me nuts that it's not working right. I have used the same compiler and basic code to get a mega328 to work. 
> 
> Appreciate any suggestions the group may have.
> 
> Thanks/jeff
> 
> 
> REFS0_bit = 1; // 001 invokes external Vref as ADC reference
> ADEN_bit = 1; // enable adc
> ADSC_bit = 1; // start conversion
> while(adsc_bit);
> lb=ADCL; // get lower byte
> ub=ADCH; // get upper byte
> adc_rd0 = (256*ub) + lb; // build number
> 
> [Non-text portions of this message have been removed]
>





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