AVR-Chat

> Can anyone here give me any pointers as to how to elegantly manage
> multi-target source/binary structures?

I do this a lot.  What you want to do is set up several small project
specific Makefiles,
for example ProjectA.mak and ProjectB.mak .

These contain the source files names, a target directory, and
configuration options.

These small project Makefiles then call a single Makefile.mak that
does the real work.

See this for an example, that answers your question in detail:

http://blog.softwaresafety.net/2010/08/building-product-variations-without.html

Today my Makefiles  make use of vpath to point to the source code.

I'm working on a series of Makefile tips:

http://blog.softwaresafety.net/2011/03/make-makefile-tip-4-gnu-make-standard.html
Tip #4
http://blog.softwaresafety.net/2010/09/transforming-files-with-wildcards-in.html
Tip #3
http://blog.softwaresafety.net/2010/09/recursive-use-of-make-makefile-tip-2.html
Tip #2
http://blog.softwaresafety.net/2010/08/building-product-variations-without.html
Tip #1
http://blog.softwaresafety.net/2010/08/automatic-serial-number-for-test-driven.html
Tip #0

I've got at least two more tips to add.  How to get the target
directory structure automatically generated, and how to use 'if' to
set paths of the build machine.

For the latter something like this, on a Windows machine:

ifeq ($(COMPUTERNAME),C655-20101219)
	cp $(OBJDIR)/$(TARGET).flash.bin C:/Projects/FirmwareUpdater/Firmware
endif

On a Linux box make use of uname.

For the former:

# In GNU Make 3.81 there's an exciting new feature called 'second
# expansion' (which is enabled by specifying the .SECONDEXPANSION
# target in the Makefile).  With second expansion the prerequisite
# list of any rule under goes a second expansion (the first expansion
# happens when the Makefile is read) just before the rule is used.  By
# escaping any $ signs with a second $ it's possible to use GNU Make
# automatic variables in the prerequisite list.
# We use this to build the empty directory structure if it does not exist.
# See the @D rules later in this file.

.SECONDEXPANSION:

%/.keep:
	mkdir -p $(dir $@)
	touch $@

.PRECIOUS: %/.keep

# The pattern rule used to make .o files has a special prerequisite
# $$(@D)/.keep which uses the second expansion feature to obtain the
# directory in which the target (from $@ using the D modifier) is to
# be built.
# See http://www.cmcrossroads.com/ask-mr-make/6936-making-directories-in-gnu-make

--
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