AVR-Chat

--- In AVR-Chat@yahoogroups.com, "erikc" <firewevr@a...> wrote:

> ... A big DRAM with a little
> CPU in one corner ...

Mitsubishi tried this but nobody bought it. It makes a lot of sense 
to me. The DRAM was 128 bits wide so the CPU could clean or fill a 
cache line in one cycle. I benchmarked their chip against a much more 
powerful MIPS it ran at half the speed with the caches on, but five 
times as fast if you turned the caches off. For any processing that 
involved a lot of data it beat the MIPS plus it was smaller, cheaper 
and used less power. As I said, nobody bought it and it faded away.

You have to bear in mind that the semiconductor fab process used to 
make DRAM is different from that used to make fast logic.  Mixing 
them on a chip is non-trivial. Plus, you sacrifice generality and 
limit your market.

Graham.