AVR-Chat

----- Original Message -----
From: "Graham Davies" <YahooGroups@ecrostech.com>
To: <AVR-Chat@yahoogroups.com>
Sent: Friday, August 06, 2004 14:24
Subject: [AVR-Chat] DRAM with CPU (was Re: Semi
manufacturers ?)


> --- In AVR-Chat@yahoogroups.com, "erikc" <firewevr@a...>
wrote:
>
> > ... A big DRAM with a little
> > CPU in one corner ...
>
> Mitsubishi tried this but nobody bought it. It makes a lot
of sense
> to me. The DRAM was 128 bits wide so the CPU could clean
or fill a
> cache line in one cycle. I benchmarked their chip against
a much more
> powerful MIPS it ran at half the speed with the caches on,
but five
> times as fast if you turned the caches off. For any
processing that
> involved a lot of data it beat the MIPS plus it was
smaller, cheaper
> and used less power. As I said, nobody bought it and it
faded away.

Perhaps it was an idea ahead of its time.  Considering all
the databases in use these days and the demands made on
them, it seems that having memory with integral search
capability would be a moneymaker.  Especially if someone
came out with a line of machines specifically for managing
databases.  (Something like SQL in hardware).

>
> You have to bear in mind that the semiconductor fab
process used to
> make DRAM is different from that used to make fast logic.
Mixing
> them on a chip is non-trivial. Plus, you sacrifice
generality and
> limit your market.

Umm, isn't there some kind of logic on the chip for decoding
and timing?  Is it somehow different (other than
arrangement) than logic used for computation?  Or am I
missing something here?

> Graham.

Erikc  - firewevr@airmail.net
///
"An Fhirinne in aghaidh an tSaoil."
"The Truth against the World."
        -- Bardic Motto
///I did NOT lose my mind!  It's backed up on the server
(and the network's down....)