Hi,
Did you initialize the stack pointer? Is there
anything fancy using push/pop/SP in your ISRs?
Rogier
----- Original Message -----From: David VanHornSent: Friday, January 02, 2004 5:37 PMSubject: [AVR-Chat] Sim problems, AGAIN.
ATMEGA8 simulation in:
AVR Studio 4, 8, 0, 310
Platform AVR Simulator Build 1, 0, 0, 12
Part ATMEGA8 Build 65
Operating System
Major 5
Minor 1
PlatformID 2
Build 2600
Service Pack 1
Problem #1:
Everything's fine initting the machine, up to Idle.
I set a BP at Idle, and run it to there.
Then I put a BP in at Panic, and take off the one at Idle.
Notice that all the routines are commented out.
So only ISR's could even be running.
After 6513uS (the loop takes 1uS) I'm at Panic, with SP at 045F
Apparently it loops in this code 6512 times just fine, then fails the same test.
Now, the question is, with SPL=5F, and SPH=04, WHY am I at Panic?
With the routines enabled, I run the machine just fine, till I hit Panic.
Idle:
;rcall Timed_Smack ;Resets watchdog, if it's time to do so.
wdr
;rcall Start_Step ;If possible, make a step, speed based on fu
;rcall Printhead_Latch ;Latches printhead, and starts burning the A half
;rcall Send_Pixel_Line ;
;rcall Fake_Pixel_Lines; Simulates reception via SPI, except a line at a time.
;Stack check
in TEMP,SPL
cpi TEMP,$5F
brne PANIC
in TEMP,SPH
cpi TEMP,$04
breq Idle
Panic:
rjmp Panic
Problem #2:
I am getting INT1 even though INT1 is disabled.
It does appear to respect GIE, but at more or less random intervals, I find myself in the INT1 ISR, with INT1 cleared in GICR.
INT0 does not seem to have this problem.
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