AVR-Chat

On Thu, Jan 29, 2004 at 07:51:23AM -0500, Dave VanHorn wrote:

> Speaking of that, I do wish that atmel hadn't decided to make the
> registers available as ram.  I'm on the trail now, of what may be a
> bad ST Z,temp into register space.  Does that platform allow
> breaking on write to ram or register?  IMHO, this is a MAJOR failing
> of all the existing AVR tools.

I just did a quick test of that and was able to break on a watchpoint.
However it doesn't look like it supports hardware assisted
watchpoints.  This means that gdb interrupts execution after every
instruction and examines the specified address to see if it has
changed.  This is quite slow, and also, gdb can only tell when the
memory changes, not when it is read or rewritten with the same value
as it currently held.  I suspect this is more a failing of
avarice/avr-gdb than of the JTAGICE, however, I'm just guessing at
that.  If so, then it is possible that the avarice/avr-gdb folks will
figure out how to make the JTAGICE do hardware assisted watchpoints
which would be much much better as the target will run a full speed
and can break on read as well as write.

I do note that I am running a dated version of avarice, as would you
if you installed it on FreeBSD using the ports mechanism that I
mentioned earlier.  I've had a little bit of trouble getting later
versions of avarice to build so that I can update the FreeBSD port (I
am the FreeBSD maintainer of that port).  However, the older version
has been working fine for me so I haven't pursued that very
diligently.  Perhaps if there is the possibility of enhanced features
such as hardware watchpoints, I will see if I can get the newest
avarice updated into the FreeBSD ports tree.

-Brian
-- 
Brian Dean, bsd@bdmicro.com
BDMICRO - Maker of the MAVRIC ATmega128 Dev Board
http://www.bdmicro.com/