AVR-Chat

Here is how I do timer startup ... (hope I got this correct...)

initialization of timer

... stop interrupts (CLI)
... stop timer TCCR1B  = 0
... set for CTC etc in TCCR1A
... set OCR1A as required
... set TCNT as required
... start timer TCCR1B = 9 (or whatever required)
... set TIMSK as necessary
... enable interrupts (SEI)

and maybe you just didn't include it but I think you must load your
interrupt service routine (ISR) address into the appropriate interrupt
vector and you must have an ISR routine.

As I understand it the flag should be cleared when the program jumps to that
ISR address.

Good Luck

Jim

----- Original Message ----- 
From: "Aaron" <aaron.groups@gmail.com>
To: <avr-chat@yahoogroups.com>
Sent: Wednesday, July 06, 2005 12:54 PM
Subject: [AVR-Chat] Timer1 Problems


> This AVR newbie is using a tiny2313 and studio 4.11.
>
> I have timer1 configured for CTC with OCR1A.   OCIE1A is set in TIMSK.
> Global interrupts are enabled.  Stepping thru the code in the simulator
> shows OCF1A being set for 1 cycle but my interrupt vector is not being
> jumped to.   My code is not clearing OCF1A and the datasheet says that
> OCF1A will not be cleared until execution of the interrup vector.  Any
> thoughts on what I am doing wrong?  Code below.
>
> Thanks,
> Aaron
>
> ; configure Timer/Counter1
>     ldi temp1,  0b00000000
>                 ; 00------  ; Compare Output Mode for Channel A, Normal
> Port Operation, OC1A & OC1B disconnected
>                 ; --00----  ; Compare Output Mode for Channel B, Normal
> Port Operation, OC1A & OC1B disconnected
>                 ; ----00--  ; reserved
>                 ; ------00  ; 00 = clear timer on compare match with OCR1A
>     out TCCR1A, temp1
>
>     ldi temp1,  0b00001001
>                 ; 0-------  ; 0 = input capture noise canceler disabled
>                 ; -0------  ; 0 = trigger capture on falling edge of IC1
>                 ; --0-----  ; reserved
>                 ; ---01---  ; 01 = clear timer on compare match with OCR1A
>                 ; -----001  ; 001 = no prescaler, internal clock
>                 ; -----011  ; 011 = 1:64 prescaler, internal clock
>     out TCCR1B, temp1
>
>     ldi temp1,  0b00000000
>                 ; 0-------  ; 1 = force output compare for channel A
>                 ; -0------  ; 1 = force output compare for channel B
>                 ; --000000  ; reserved
>     out TCCR1C, temp1
>
>     cli                     ; clear interrupts for 16-bit register access
>
>     ldi temp1, 0x1F         ; 8Mhz clock -> 125 ns instruction cycle
>     ldi temp2, 0x40         ; ...for a 1 ms delay we need 8000
> instruction cycles
>     out OCR1AH, temp1       ; ...8000 decimal = 0x1F40
>     out OCR1AL, temp2
>
>     sei                     ; enable interrupts after 16-bit register
access
>
>     ldi temp1,  0b01000000
>                 ; 0-------  ; 0 = Timer/Counter1 Overflow Interrupt
Disabled
>                 ; -1------  ; 1 = Timer/Counter1 Output Compare A Match
> Interrupt Enabled
>                 ; --0-----  ; 0 = Timer/Counter1 Output Compare B Match
> Interrupt Disabled
>                 ; ---0----  ; reserved
>                 ; ----0---  ; 0 = Timer/Counter1 Input Capture Interrupt
> Disabled
>                 ; -----0--  ; 0 = Timer/Counter0 Output Compare B Match
> Interrupt Disabled
>                 ; ------0-  ; 0 = Timer/Counter0 Overflow Interrupt
Disabled
>                 ; -------0  ; 0 = Timer/Counter0 Output Compare A Match
> Interrupt Disabled
>
>     out TIMSK, temp1
>
> Loop:
>    nop
>    nop
>    nop
>    nop
>    nop
>    rjmp Loop
>
>
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