1st of all, when you say something like "speed
optimization" you may have some of these problems:
1- you didnt analysed your application properly.
2- bcz you didnt do such application before, you may
afraid of program execution speed or something.
before any thing let me to say designing a
microcontroller based system is not a cheap thing. but
very important even for hubby. you have to analyse all
software and hardware requirements before selecting
microcontroller family to use, language to write code,
speed of microcontroller, etc.
for example:
assume we want to design a microcontroller based
system for some reasons, which:
must sample a series of incoming data rated at 20KHz
and apears ABOUT every 100 ms (not exactly 100ms!).
so we may use code to monitor incoming signals,
grabbing them, and save them. but this way may works
for this problem in application. and waste all micro
processing power. but if we should capture 10 bytes of
data by using an interrupt source and a simple
assembly language code, we only may waste 5% of cpu
power using a 8MHz clock freq.
or another sample:
assume we have a serial interface which some packets
comes. we must grab incoming packet, analyze it and
send desired reply to incoming packets. commonly most
of people use a simple interrupt driven routine to
grab data and queue it into micro controller memory,
then process it in a cyclic fashion. but for a high
rate of packets this method will not work perfectly.
in such situations i suggest to use a state machine
instead of simply grabbing data from UART.
as a result of my experiments, the codevision compiler
is not a good C compiler. i prefer GCC for high level
logics, not all logics. 1st i broke the entire logic
into two groups, critical ones which need to be very
fast, which must be written in assembly and slow
logics but complex ones, which MAY be written in C
language. for example i wrote a software on a ATmega64
microcontroller works at 4MHz which deals with
following resources:
1- sampling 14 bytes of data by a rete of 20KHz at
every about 150ms periods.
2- a fast UART based state machine which must response
to a host system, in less than 3ms after every packets
comes.
3- refreshing a LCD.
4- controlling a hardware with a 10ms response time.
after implementing the application, only 10-20% of CPU
power wasted for operating, and other times, CPU stay
in sleep mode to reduce power needs.
a simple note, but very important:
in implementing a design, when you felt reaching to
80% of any resources, (memory, CPU power, code size,
fpga cell used, amount of signals, etc...) it may be a
good time for thinking of some reasons to find why you
reach to this limit. 20% of any resources must left
free for enhancement and maintaining the design, not
to solve basic problems.
good luck;
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