AVR-Chat

I am working on a control application that reads
quadrature readings from an encoder.  I seem to
missing some counts.  I am wondering what happens to
the interrupts when you are in the "SIGNAL(SIG_LCD)"
ISR routine?  I assume  they are turned off, but I am
wondering if an interrupt occurs while in the routine,
is it saved and executed latter, upon exit?

The documentation is not clear to me, as to what
happens if I get an interrupt on my quadrature sensors
while I am in the LCD ISR.  

Also, can I use cli(); and  sei(); instructions
without fear of missing an interrupt?  I need to read
every quadrature interrupt, although I can wait until
another ISR finishes.

My max interrupt rate is probably around 2000/sec or �
millisecond.

I am using the AVR butterfly.

What approach do you recommend?

Thanks

Al
 

Bit 7 � I: Global Interrupt Enable

The Global Interrupt Enable bit must be set for the
interrupts to be enabled. The individual interrupt
enable control is then performed in separate control
registers. If the Global Interrupt Enable Register is
cleared, none of the interrupts are enabled
independent of the individual interrupt enable
settings. The I-bit is cleared by hardware after an
interrupt has occurred, and is set by the RETI
instruction to enable subsequent interrupts. The Ibit
can also be set and cleared by the application with
the SEI and CLI instructions, as described in the
instruction set reference.

al boehnlein schrieb:
> I am working on a control application that reads
> quadrature readings from an encoder.  I seem to
> missing some counts.  I am wondering what happens to
> the interrupts when you are in the "SIGNAL(SIG_LCD)"
> ISR routine?  I assume  they are turned off, but I am
> wondering if an interrupt occurs while in the routine,
> is it saved and executed latter, upon exit?

What does your SIG_LCD do?

Where in the code you are is not that interesting, but the state of the 
global interrupt enable bit is. This is the flag you turn on and off 
using CLI and SEI instructions. To fully understand what your (C) code 
does, disassemble your compiled code or have the compiler output the 
assembler source and look at the assembler instructions generated. Then 
look up the instructions in the documentation. You will notice that 
interrupt subroutine calls (like your SIGNAL(SIG_LCD)) will end with a 
RETI instruction, that turns back on the global interrupt enable flag. 
Looking at the documenation about interrupt handling you will see that 
upon handling a non-masked interrupt, this flag is turned off before the 
SIGNAL()-routine is executed.

> The documentation is not clear to me, as to what
> happens if I get an interrupt on my quadrature sensors
> while I am in the LCD ISR.  

The interrupt is flagged (that is, the flag bit of that interrupt is 
set) but not handled, because global interrupts are disabled.
As soon as your routine ends (or a CLI is executed), the next pending 
interrupt (determined by the interrupt flag) is executed. That could 
then be your sensor inputs.

> Also, can I use cli(); and  sei(); instructions
> without fear of missing an interrupt?  I need to read
> every quadrature interrupt, although I can wait until
> another ISR finishes.

You won't miss one interrupt - but think about what happens if you get a 
second interrupt of the same type without the first being serviced. You 
will never notice you missed one.

One way to at least detect this is to hook the inputs to a counter and 
check on each interrupt invocation if the counter state matches your 
exceptations. If it doesn't there was such a condition with a second 
interrupt that was "masked" by the first.

Regards,
Philipp

On Mon, Mar 28, 2005 at 10:55:50AM -0800, al boehnlein wrote:
[...]
> The documentation is not clear to me, as to what
> happens if I get an interrupt on my quadrature sensors
> while I am in the LCD ISR.  

How much time are you spending in the LCD ISR? I've seen many cases
where somebody went off and wrote their entire program in ISR(s). It was
quite a mess. With few exceptions one should only jump in and back out
as quickly as possible in the ISR. Leave the number crunching in "user"
time outside of IRQ time.

Summarizing what others have said, while the I bit is disabled pending
IRQs are not cached but they will pile up. Only one per source can pile
up, all others from the same source will be lost. Once the I bit is
enabled pending IRQs will be dispatched based on the priority Atmel
defined in the user manual.

-- 
David Kelly N4HHE, dkelly@HiWAAY.net
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Whom computers would destroy, they must first drive mad.