AVR-Chat

All,

Thanks for all the comments on bogus op-codes. The boot loader code is about done.
I'm at the point of exiting the loader and starting the application code but haven't
decided which way to go. The original application code was done assuming that the cpu
would startup from a reset though it may work just fine using a jump to 0x0000.

I started playing with the watchdog timer in Studio sim and it does work but the timing
is way off vs the data sheet specs. Enabling the timer with the prescaler bits all clear
should result in a 14-15 ms timeout but Studio sim pops to the reset point in something
under 2 ms. This all may just be a sim bug, like SPM page erase and writes only taking
one clock cycle, no big deal. The other issue, and on this the data sheet says nothing,
is that the WD timer is still enabled after the timer triggered reset.

Does anybody have any insights as to how the real hardware does it? Is it still enabled
after a reset? If it is, I'll need to set the timer for a longer period to get through
the app startup.

Thanks in advance.

Bruce

Unfortunately, I have no specific experience with the watchdog 
timer.  But, I have had siginficant trouble with the simulation of 
timers in general, triggering of timer interrupts in the simulator.  
I have tried the simulator for my 128.  Out of frustration I 
eventually set the simulator to mimic the 103 and it worked with 
fewer bugs.

Atmel confirmed the bugs (rather than my own errors) but effectively 
said that they had no timetable for fixes.  

So, one thing you could do is to try setting the simulator to 
emulate some earlier uC that has the same hardware that you are 
using (if it is missing stuff you do not use, then it may not be a 
problem).

This way you might be able to tell if it is a bug in the simulator 
or your own code.

I have essentially given up simulating my code for the 128.  It is 
much too dependent on timers and outside input to do anything 
meaningful in the simulator. Nevertheless, I would have had my life 
made so much easier in the beginning if the simulator worked 
properly.

I would much rather not have certain functions simulated at all, 
rather than have them simulated incorrectly.  Random undocumented 
bugs and errors make the simulator nearly useless IMHO.  

I thin that certain earlier processors have had all the simulator 
bugs eliminated.  BUt not the 128.

-Tony

--- In AVR-Chat@yahoogroups.com, Bruce Parham <obparham@j...> wrote:
> All,
> 
> Thanks for all the comments on bogus op-codes. The boot loader 
code is about done.
> I'm at the point of exiting the loader and starting the 
application code but haven't
> decided which way to go. The original application code was done 
assuming that the cpu
> would startup from a reset though it may work just fine using a 
jump to 0x0000.
> 
> I started playing with the watchdog timer in Studio sim and it 
does work but the timing
> is way off vs the data sheet specs. Enabling the timer with the 
prescaler bits all clear
> should result in a 14-15 ms timeout but Studio sim pops to the 
reset point in something
> under 2 ms. This all may just be a sim bug, like SPM page erase 
and writes only taking
> one clock cycle, no big deal. The other issue, and on this the 
data sheet says nothing,
> is that the WD timer is still enabled after the timer triggered 
reset.
> 
> Does anybody have any insights as to how the real hardware does 
it? Is it still enabled
> after a reset? If it is, I'll need to set the timer for a longer 
period to get through

> the app startup.
> 
> Thanks in advance.
> 
> Bruce

--- In AVR-Chat@yahoogroups.com, Bruce Parham <obparham@j...> wrote:
> I started playing with the watchdog timer in Studio sim and it
> does work but the timing is way off vs the data sheet specs. 

I wouldn't trust the simulator much for anything other than 
arithmetic/logic.  In my opinion, a simulator is not of much value 
when you can try things out on the "real thing" and not have to worry 
about simulation-induced errors and anomalies.  Get yourself a JTAG 
ICE device and have at it.

I have used the original JTAG ICE which I got free for attending an 
Atmel seminar.  Depending on which chip you want to use you may need 
to get a JTAG Mk II.  Although I haven't used it myself, I've heard 
good things about the ECROS Technology JTAG device which costs less 
than the one from Atmel.

http://www.ecrostech.com./Products/AvrJtagIce/Intro.htm

> Does anybody have any insights as to how the real hardware does it?
> Is it still enabled after a reset?

No, the watchdog timer is not enabled after reset.  If you look at the 
datasheet for the device you'll see that the all the bits of the WDTCR 
register have an initial value of zero.  The initial values prevail 
after any of the reset events (power on, external reset, etc.).

Don