Doepfer

Hello David,

Am 18.11.2014 14:18, schrieb David Kellett davidkellettwoulf@yahoo.com 
[Doepfer_a100]:
 > Maybe I've misunderstood the use of the LFO clock in your patch?


yes, you misunderstood: I do not describe the circuit, that creates a 
gate at a CV change. I assume, that this circuit already exists (the 
others made suggestions already - let it be any quantizer).

I describe the circuit, that converts the rate of these gates into a 
control voltage. Basically this is a frequency to voltage converter.

Lets get back to your original mail. You have two requests:

 > 1) To create  a CV based (proportional to) on the rate of
 > change of another CV
 > 2) To create a gate when there is a step in a CV. This is
 > particularly but not exclusively the output of a Intellijel
 > uScale - so when there is a new pitch I would like to create a
 > gate.

You defined the problems in the wrong order. The correct order is:

First you have to create a trigger at each change of the incoming CV. 
This is what the quantizers can do.

Now that you have these triggers, you can count the time between two 
triggers coming from the quantizers and convert the digital value (which 
corrsponds to the time) into a CV.



Florian


PS: I still did a small mistake in my description: the resulting voltage 
will be the higher the slower the triggers do repeat. To get a real F->V 
conversion you have to invert the voltage and then add an offset voltage 
to the inverted CV.
But all that is theory. Usually one would not build that with separate 
modules, but would implement it in a single (diy-)module. The you can 
avoid also the inversion thing.