Hi Fernando,
Sorry, I was out of town last week and going by memory. This morning I
hooked up the scope and double-checked - and found out some other
interesting stuff, as well (see below). GATE does indeed drop when
OUTPUT goes above about 3.5v. Peak OUTPUT voltage is about 5.5v.
So yeah, GATE is high for more than half of the attack. That doesn't
seem weird to me, although it does contradict what's on the Egres
Wizardry page: "When the cycle starts a gate trigger output goes low."
Maybe that was for the old DSG - John Lofflink says below that "The old
DSG was a narrow pulse output, going high at the end of the cycle". If
the DSG were patched to cycle, and GATE went low when the cycle
started, then you would get a narrow pulse.
What would make the most sense to me, and what the Gold book implies
(page 4-27), is that GATE would go low when OUTPUT switches from rising
to falling. Then GATE would just be a Schmitt trigger output, set low
when OUTPUT goes above 5v, and set high when OUTPUT crosses 0v. Pulsing
TRIG IN would then switch the voltage slewer to track GATE instead of
INPUT until the trigger is activated (i.e. OUTPUT hits 5v, and starts
falling).
But there seems to be more internal state than just GATE. Try this:
patch in a negative bias voltage to INPUT, while the DSG is cycling. If
the bias is positive, cycling stops (because the output never falls
below 0, to finish the cycle). If the bias is between -3v and 0v, you
get cycles that peak at 5.5v and drop down to the bias voltage. But if
the bias is < -3v, cycling again stops, and OUTPUT stays at something
like 8.5v + bias. I.e., at -3v OUTPUT stays at 5.5v, and it drops as
you decrease the bias further.
So there's an internal voltage which is added to the input, and this is
what the slewer always follows. This voltage goes to about 8.5v when a
cycle is started, and drops to 0 when OUTPUT rises above 5.5v. The only
remaining interesting behavior is that the cycle can't be retriggered
until it has completed (i.e. both GATE and the internal voltage are at
0). But I guess this is a feature, not a bug, so presumably there's
just some input logic to implement this: e.g, a rising-edge detector on
TRIG IN, ANDed with GATE.
Bob Hearn
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On Oct 29, 2004, at 10:43 AM, Fernando wrote:
>
> Thanks Bob, the peak voltage of the main out is 5V? 10V?
>
> If it is, it seems the gate is high in a bit more than half of the
> attack...
> Nice but weird!
>
> Fernando
>
>
> > My DSG GATE out goes low when the output goes above about 3.5v, then
> > high again when the output drops back to 0. So, you can use it for
> > variable width pulses, but it's fiddly to control the pulse width.
> >
> > Bob
> >
> >
> > On Oct 29, 2004, at 11:20 AM, Fernando wrote:
> >
> > >
> > > Thank you John,
> > >
> > > variable pulse width waveform proportional to the cycle's
> duration?
> > >
> > >
> > > > The old DSG was a narrow pulse output, going high at the end
> of the
> > > cycle.
> > > > The post 1994 DSGs with a GATE output give a variable pulse
> width
> > > waveform
> > > > output, which is much more useful.
> > > >
> > > > John Loffink
---------------------------------------------
Robert A. Hearn
http://www.swiss.ai.mit.edu/~bob/