it's a bit like the encore UEG. and Jim patchell made a multistage
envelope and I saw one other posted somewhere before. i thoguht I
remembered one of Ken's circuits looked like it could be made to do this
with some modification? read on.
Larry T. wrote:
finish before I start building/testing. but mine is planned to use a
small atmel AVR microcontroller to handle some things. the idea is to
use some 8:1 analog multiplexers and a voltage controlled integrator
with negative feedback. some analog switches to handle different modes
and a AVR uC to handle linear mode and also stage selection.
basic features: 2-8 stages selectable
modes: one shot, envelope with looping sustain over selectable loop
range, lfo mode, sequencer mode.
envelope loop has start and end loop stage selection with a rotary
switch. release stage with rotary switch. release sets end points of all
the modes.
lfo mode loops from loop start to loop end forever.
sequencer mode makes sense because it's got everything needed for a
simple sequencer. only difference here is that it's externally clocked
instead of by an internal comparator.
slopes: linear, log, pulse. linear slope is what I'm not completely sure
about yet. I figured I'd subtract the voltage of the next stage from the
current output voltage when it's time to switch, then take that value on
an ADC of the AVR as well as a comparator that shows direction (+ or -).
the AVR would then output on a simple DAC that value until the next
stage was reached. this is so that if any two stages are set to have the
same time then they will have roughly the same time even if the voltage
differences are different. log mode does this internally because of the
negative feedback on the integrator. pulse just outputs the 8:1 mux
voltage selected.
inputs: gate, trigger, clock (for sequencer mode or maybe gate will do
that in sequencer mode)
outputs: Voltage out, new stage trigger out, finish trigger out,
possibly a gate out with length pot that starts on each stage. thats for
sequencer mode.
there's probably more features that I can't remember right now. it's all
written down in schematics on a bunch of papers scattered across my room.
so, it's kind of digital you are thinking. well of course, it kind of
has to be. I first started designing it some months ago into a CPLD for
all the logic and the normal analog circuit for generating the EG. It
was a good way to learn verilog, but I decided i might need an ADC for
the linear mode. sugestions for linear mode are welcome. I also figured
that if someone else were to build this, it would be alot easier to pop
in a little AVR microcontroller than a 44pin CPLD that only comes
surface mountable. the microcontroller will limit speed to something
like 4 or 5 thousand stages per second based on the ADC speed but the
integrator will limit this more since it's made for CV outputs and I'd
rather have long time settings that really short ones.
so, hopefully this will be going in january. till then I'm building
theremins with my brother:). and doing final exams for school :(.
ryan
envelope and I saw one other posted somewhere before. i thoguht I
remembered one of Ken's circuits looked like it could be made to do this
with some modification? read on.
Larry T. wrote:
> Good Day EveryoneI have one mostly designed. but it's waiting for another project to
>
> How about something with 4 to 10 segments (the more the merrier),
> where I can specify the step that is the Sustain for the Gate and,
> potentially, the restart point for the Trigger. Each step would have
> a `rate' and a `level' control (pot). (Hey, ten stages, 20 pots, this
> could be a really FUN module!)
>
> Is anyone interested in designing/building such a beast? Is anyone
> interested in using such a beast?!? It does not necessarily need to
> be Voltage Controlled other then the Gate and (optionally) Trigger
> points. (VC of the number of stages might be interesting…)
finish before I start building/testing. but mine is planned to use a
small atmel AVR microcontroller to handle some things. the idea is to
use some 8:1 analog multiplexers and a voltage controlled integrator
with negative feedback. some analog switches to handle different modes
and a AVR uC to handle linear mode and also stage selection.
basic features: 2-8 stages selectable
modes: one shot, envelope with looping sustain over selectable loop
range, lfo mode, sequencer mode.
envelope loop has start and end loop stage selection with a rotary
switch. release stage with rotary switch. release sets end points of all
the modes.
lfo mode loops from loop start to loop end forever.
sequencer mode makes sense because it's got everything needed for a
simple sequencer. only difference here is that it's externally clocked
instead of by an internal comparator.
slopes: linear, log, pulse. linear slope is what I'm not completely sure
about yet. I figured I'd subtract the voltage of the next stage from the
current output voltage when it's time to switch, then take that value on
an ADC of the AVR as well as a comparator that shows direction (+ or -).
the AVR would then output on a simple DAC that value until the next
stage was reached. this is so that if any two stages are set to have the
same time then they will have roughly the same time even if the voltage
differences are different. log mode does this internally because of the
negative feedback on the integrator. pulse just outputs the 8:1 mux
voltage selected.
inputs: gate, trigger, clock (for sequencer mode or maybe gate will do
that in sequencer mode)
outputs: Voltage out, new stage trigger out, finish trigger out,
possibly a gate out with length pot that starts on each stage. thats for
sequencer mode.
there's probably more features that I can't remember right now. it's all
written down in schematics on a bunch of papers scattered across my room.
so, it's kind of digital you are thinking. well of course, it kind of
has to be. I first started designing it some months ago into a CPLD for
all the logic and the normal analog circuit for generating the EG. It
was a good way to learn verilog, but I decided i might need an ADC for
the linear mode. sugestions for linear mode are welcome. I also figured
that if someone else were to build this, it would be alot easier to pop
in a little AVR microcontroller than a 44pin CPLD that only comes
surface mountable. the microcontroller will limit speed to something
like 4 or 5 thousand stages per second based on the ADC speed but the
integrator will limit this more since it's made for CV outputs and I'd
rather have long time settings that really short ones.
so, hopefully this will be going in january. till then I'm building
theremins with my brother:). and doing final exams for school :(.
ryan
> Looking forward to what this will generate…
>
> Larry T.