I fired up a Sequential Switch (the V1 model if that matters) that I built long ago.
I was playing with plugging the SeqSw step outputs (P1, P2, etc) to the Clock IN on my newly built Gate Sequencer and noticed that while steps 1, 2 & 3 advance the Gate Seq as you would expect, step 4 output advances the Gate Seq *2* steps, as if it is double-triggering.
Any suggestions on what I might look for on the SeqSw that would cause the P4 output to double-trigger? I have it configured as a basic 8 step sequencer (no inputs on the steps). And I don't have a scope [☹]
Drew
[Non-text portions of this message have been removed]
I was playing with plugging the SeqSw step outputs (P1, P2, etc) to the Clock IN on my newly built Gate Sequencer and noticed that while steps 1, 2 & 3 advance the Gate Seq as you would expect, step 4 output advances the Gate Seq *2* steps, as if it is double-triggering.
Any suggestions on what I might look for on the SeqSw that would cause the P4 output to double-trigger? I have it configured as a basic 8 step sequencer (no inputs on the steps). And I don't have a scope [☹]
Drew
[Non-text portions of this message have been removed]