Cgs synth

Hi, i'm building the CGS 121 Quad comparator and Memory Cells, i have not muck space in my panel, so i would configure it with two comparators and the two cells as flip flops

For this configuration do you suggest to wire CLOCK and DATA or SET and RESET?

Also: which is the right value for the input balance potentiometer, 10k as in the schematics or 100k as in the BOM?

Thanks

Mauro