Pullup selection are dependent on where they are going, and how fast
a rise time you need. The smaller the pullup value, the more current
you're using when it's low. For a signal going off-board, 10K may not
be sufficient. For connecting an average device on the same board, it's
plenty. At 3.3V, 10K is 330ua. For 4.7K, it's 702ua. Which you
select also depends on the normal state of the line. If the line is low
the majority of the time, and you don't need fast rise times, you're
wasting power with unnecessary stiff pullups.
Most of our 3.3V designs use 10K pullups, and it's never been an
issue. That being said, my experiences do not yet include the LPC2100.
Reading the port specs, they don't seem out of line, so I'd select a 10K
in most cases (I'd like to find out who designed the port architecture
on the LPC2100, and viciously beat them about the head and shoulders
with a golf club. You'd think Philips would know SOMETHING about port
design, given their 8051 experience. No selectable internal pullups?
What WERE they thinking?) .
In the olden days of slower TTL logic and lower noise immunities,
4.7K pullups on 5V logic was pretty much the norm. These days, stiff
pullups for "normal" signals (parts with good current sink capability,
better immunity to noise, etc) aren't really necessary.
--jc
Robert Adsett wrote:
> [snip]
>
> >
> >2) The reader has 10K pullups on the STROBE and DATA lines and I was
> >wondering if these are to much?I know this question have been asked
> before
> >so I apologise for asking somebody to repeat themselves!!!
>
> 10K always strikes me as weak. I'm using 4K7 without any problems.
>
> [snip]
>
>
> RobertMessage
Re: [lpc2100] GPIO Questions!
2004-02-14 by J.C. Wren
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