Lpc2000

Yup, that' what I did.  

I'll let everyone know what I find out.  I heard all the LPC chips 
are getting rev'd to fix errata soon, so this could be good timing 
if it truely is a random issue that can be fixed in silicon and it's 
not something that can be prevented on the board itself.

-Bruce

--- In lpc2000@yahoogroups.com, Tom Walsh <tom@o...> wrote:
>
> bruce_p1 wrote:
> 
> >Tom,
> >
> >What you describe is the norm for secondary JTAG debugging and is 
> >well understood.  But, some people, including myself, have seen 
this 
> >not work on some LPC chips on certain circuit boards.  The only 
way 
> >I saw it fixed was to keep DBGSEL high and RTCK low.
> >
> >I have designed quite a few other boards that work perfectly, but 
> >have now seen random chips not allowing a secondary JTAG 
> >connection.  This makes me wonder if there is a certain 
combination 
> >of things that cause this issue (e.g., on-board capacitance, 
certain 
> >batches of chips from a certain fab, reset timing, crystal 
> >frequency, power supply sequencing, timing issue with DBGSEL, 
> >etc.).  These things can probably only be answered by the Philips 
> >designers is my guess.
> >
> >  
> >
> Perhaps telephone the local Philips Field Rep and get on their 
case 
> about the issue?
> 
> Regards,
> 
> TomW
> 
> 
> -- 
> Tom Walsh - WN3L - Embedded Systems Consultant
> http://openhardware.net, http://cyberiansoftware.com
> "Windows? No thanks, I have work to do..."
> ----------------------------------------------------
>