Lpc2000

seangra wrote:

>>You could clue us in on what specific processor the question is 
>>about.  The UART clock is a bit different in some of the uCs.
>>    
>>
>
>Sorry, my bad.
>
>It's LPC2148.
>
>  
>
>>I am not an expert in this, but I think the higher the multiplier
>>(= a lower external crystal freq) the more jitter you get on the
>>CCLK. So if you want a very stable CCLK you choose the highest 
>>supported external crystal frequency you can find.
>>    
>>
>
>  
>
No, not really.  You have to be aware of PPM spec of the crystal. Parts 
Per Million is a statement of the accuracy of the crystal at a given 
frequency (Million being Million Cyles or MHz, Parts being the cycles of 
drift).  But higher frequency 5PPM is no more / less accurate than 5PPM 
at a lower frequency...  It does compute into a percentage of error though.



>What effect does jitter on the CCLK line have?
>
>Original question:
>  
>
>>Assuming that I want to be able run at maximum speed, what 
>>oscillator/crystal should I choose?
>>
>>Normally the choice is dictated by the divider for the UART, 
>>but in this case (from what I understand) with the prescaler you
>>can get just about any baud rate you want from whatever 
>>source frequency you choose.
>>
>>So if 10*6 or 20*3 or 15*4 all yield 60MHz, what factors are 
>>there that influence which frequency should be used?
>>    
>>
>
>  
>
For me, the primary choice of frequency was that of the bootloader.  
14.7456MHz crystal was one of the recommended frequencies and it would 
give me a 58MHz clockrate for the CPU.  I also have some MAX3100 SPI 
UARTs on my board, they needed a 3.686MHz clock, by using an external 
TTL oscillator to drive both the X1 input of the processor and drive the 
input to a divide by 4 counter (74HC93), I was able to satisfy the CPU 
and the UARTs with one clock source.


TomW


-- 
Tom Walsh - WN3L - Embedded Systems Consultant
http://openhardware.net, http://cyberiansoftware.com
"Windows? No thanks, I have work to do..."
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