Lpc2000

--- In lpc2000@yahoogroups.com, Richard Duits <yahoo@r...> wrote:

> tasking12 wrote:
> 
>> does anyone know, has a communication channel an interrupt flag
>> which must be cleared in the Interrupt routine?

> The DCC (debug communications channel) interrupts are cleared when
> the data is read (rx interrupt) or written (tx interrupt).
> If you have no more data to send, you have to disable the tx
> interrupt to keep it from firing again.

I guess you are thinking of the A*mel USARTs.  The "Transmit Holding 
Register Empty" interrupt flag of the 16C550 compatible UARTs in 
LPC2000 must be reset in the interrupt handler.  It is done by either 
reading the IIR register (if source of the interrupt) or by writing a 
new byte to transmit to the THR register.

The former case means that if you read the IIR and it indicates that 
a THRE is the highest-priority pending interrupt, you have just reset 
the THRE flag.  If the IIR indicates something else, any pending THRE 
interrupt stays pending.

Karl Olsen