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Re: [lpc2000] LPC2103 Users Manual

2005-12-02 by Karl Olsen

---- Original Message ----
From: "philips_apps" <philips_apps@...>
To: <lpc2000@yahoogroups.com>
Sent: Friday, December 02, 2005 9:59 PM
Subject: [lpc2000] LPC2103 Users Manual

> just posted the LPC2103 Users Manual. The version that will be
> available form our website later will be MUCH bigger in filesize. Only
> differences are internal links for figures and tables not functional
> in this much smaller document.
>
> Let us know if you find problems in the manual.

A few comments:

First, the manual looks nice, except for the green underlined comments.

Chapter 3.8 needs updating where it says "The input frequency is multiplied
up the range of 10 MHz to 60 MHz using a Current Controlled Oscillators
(CCO). The multiplier can be an integer value from 1 to 32 (in practice, the
multiplier value cannot be higher than 6 on the LPC2104/05/06 due to the
upper frequency limit of the CPU)."

Table 27 briefly mentions a Power-On Reset event.  Does the LPC2101/02/03
contain a reliable power-on reset circuit so you can simply tie /RST high?

Chapter 4.9 suggests MAMTIM=3 for cclk > 40MHz.  I guess it should be
MAMTIM=3 for 40MHz < cclk <= 60 MHz, and MAMTIM=4 for cclk > 60 MHz.  Or did
you also speed up the flash cycle time when speeding up cclk from 60 to 70
MHz?

Chapter 8.5.4 tells that the fast GPIOs are 3.5 times faster than the old
ones.  You could also simply say that a store to a fast GPIO register is
done without wait states and thus takes two cclks, while a store to an old
GPIO register (with pclk=cclk) takes 7 cclks.  I'd also like to see the
number of waitstates added by the AHB bridge and AHB-APB bridge documented
somewhere.

It looks like, except for the available match/capture pins, the only
difference between timer 0/1 and timer 2/3 is the width of the counter,
prescaler, match, and capture registers.  Is that correct?  (And did you
really save that much silicon by halving these widths?)

The TC values in chapter 16.5.4 don't look right for a 16-bit counter.

I guess that the bit numbers in table 173 and 183 should be 0,1,2,3 not
0,1,1,1.

Table 1 in the Microprocessor Report article
http://www.standardics.philips.com/support/techdocs/microcontrollers/pdf/article.challenge.8-bit.mcu.pdf
mentions some more power saving modes than the manual.  Does the manual tell
the full story?

Karl Olsen

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