Can Philips comment if Quick-Pulse parallel programming can void CRP? I am advised parallel programming used to load on-chip flash from scratch can also read on-chip flash. You can find which list parts can be access this way by looking at PP/ISP/IAP column for LPC2000 series here: http://www.microem.ru/pages/ARM/files/Microcontrollers%20selection%20guide%2009_2005.pdf Note that all parts without external memory interface can be be parallel programmed. Parts with external memory interface however do not support parallel programming. I am told this is because these devices can be forced to boot via external memory (by twiddling pins during reset) and allow external code to initialise on-chip flash from scratch. I need the above clarified ASAP before I can advise clients that their code on LPC part shipped to customers is really protected from preying eyes. Many thanks. Jaya --- In lpc2000@yahoogroups.com, Richard Duits <yahoo@r...> wrote: > > The JTAG is disabled on reset and it is enabled by the bootloader code > when CRP is not enabled. See previous discussions on this list about > JTAG debugging from reset for more information. > > Richard. > > > jayasooriah wrote: > > > Am I right in assuming LPC2000 CRP is a software fence implemented in > > the supplied boot loader code? > > > > In the case of AVR, CRP is implemented in hardware. This means that > > locked down code in flash can be executed but not read from flash by > > preying eyes. Thus we ship products with our code locked down in the > > boot sector assured that our code is secure from preying eyes. > > > > If JTAG is used to bring LPC2000 out of reset on power up (and thus > > stop boot loader code from executing), will this also void CRP? > > > > The LPC2000 series support Quick-Pulse programming. Can this method > > of parallel programming be used by preying eyes to read CRP'ed code?
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Re: FLASH Security
2005-12-18 by jayasooriah
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