Version 2 of the UART, Blinky LED codeis now posted. I went ahead and protected the code which re-enables the uart interrupt in addition to when it is disabled. While the demo code does not have a preemptive OS, if it did, it would be possible (not probable) for another process to sneak in during the execution of the RMW sequence and modify the mask. The protection closes that possibility. As a side note. The disabling and restoring of the global interrupt flag in the cpsr can has a similar problem. It has to do with the processor actually having multiple psr's and preemptive processes doing the same thing to it while the main line code thinks it is either enabling or disabling the current IRQ bit. However, without preemptive processes or ISR's which muck with the interrupt flag bits, I don't believe there is a problem. For more info on this, Atmel has an APP note discribing it on their web site in the AT91 ARM7 section. Regards -Bill Knight R O SoftWare
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Re: [lpc2000] UART TX FIFO and INTs problem - SOLVED
2004-02-22 by Bill Knight
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