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Re: LPC2106 Refuses to Enter Primary JTAG Debug Mode

2006-01-03 by frank_kienast

Thanks for the reply.  I am in fact pulling both DBGSEL and RTCK 
high.  I tried all 4 possible combinations of logic levels on these 
two pins and none of them cause TDO to do anything other than float 
upon reset or powerup.

Frank

--- In lpc2000@yahoogroups.com, "rtstofer" <rstofer@p...> wrote:
>
> 
> I'm confused by what you have said but here's what I think I 
know:  
> RTCK is pulled high on the board.  No problem.
> 
> To enter and use JTAG debug, DBGSEL must be pulled high.  It is 
> normally held low by a pull down resistor.  Install the jumper to 
> use JTAG.  The BSL jumper doesn't matter during JTAG operation.
> 
> This is the way it is described in James Lynch's tutorial on page 
> 7.  And, other than issues with OCDRemote, it worked for me when I 
> first tried using JTAG.  Do to a limited number of pins, I am not 
> currently using it.
> 
> 
> Richard
> 
> --- In lpc2000@yahoogroups.com, "frank_kienast" <fkienast@v...> 
> wrote:
> >
> > I have an Olimex LPC2106 header board.  I was not having any 
luck 
> > getting this to communicate with an LPT port debugger, so I did 
a 
> > few tests.  
> > 
> > According to the LPC2106 datasheet (Section 18 - EmbeddedICE 
> logic), 
> > both the DBGSEL and RTCK pins must be held high on reset to 
enter 
> > debugging mode.  However, the document with the header board 
from 
> > Olimex says that DBGSEL should be held low during power up to 
> enable 
> > debug mode, and it doesn't mention RTCK at all.  I tried all 4 
> > combinations of logic on these two pins, using both reset and 
> > removing and re-applying power.  Regardless, I always found that 
> TDO 
> > is floating.  If I'm understanding correctly, it should be 
either 
> > high or low at all times in debug mode since it is the JTAG data 
> > output.  
> > 
> > To eliminate possible parallel port issues, I used another 
> > microcontroller to attempt to communicate with the JTAG port for 
> > testing purposes.  As expected, I found that TDO remains 
floating 
> > throughout all attempts at communication.  Next I tried 
> configuring 
> > the secondary JTAG pins via a short program.  When I do this, I 
> find 
> > that TDO (using the secondary port) assumes a strong high or low 
> > state, which changes during communication.  Looking at a JTAG 
> state 
> > diagram and doing a bit of bit twiddling, I found I was able to 
> get 
> > into Shift-DR mode on the JTAG port.  I was able to read the 
> device 
> > ID (I got 0x4F1F0F0F).  However, attempts to write the IR did 
not 
> > work.  Regardless what I wrote to IR I would get the device ID 
> back 
> > when I read data in from DR.
> > 
> > I know my circuit is good, given that I can communicate manually 
> via 
> > the secondary JTAG port (in a limited fashion, which may be due 
my 
> > incomplete understanding of the JTAG protocol).  Why won't the 
> > primary JTAG port work at all?
> > 
> > I remember once reading that some people had problems getting 
the 
> > primary JTAG port to work with a different LPC2* chip (I don't 
> > remember which chip but it was not the 2106).  The Olimex board 
> has 
> > a 14.7456MHz crystal (which I can't change).  Could that be part 
> of 
> > my problem?
> > 
> > Incidentally, I noted that a sample "LED flash" program 
continued 
> > running happily throughout all my tests (even where I was 
> > communicating actively with the secondary JTAG port).  Is this 
> > normal?  
> > 
> > Thanks for any help.
> > 
> > Frank
> >
>

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