Robert Adsett wrote:
> [snip]
>
> That I can understand (I've done it myself), but even in that case you
> don't modify the status register of the process you are interrupting but
> only your own copy. The usual interrupt entry in either SW or HW goes
> something like
>
> save processor status
> save interrupt return address
>
> and then on exit
>
> return to saved return address
> restore processor status
>
> The issue in the appnote involves modifying the saved processor
> status. (ie that of the interrupted code) I don't understand why you
> would want to do that. In the best case it will do nothing and in the
> worst....
>
[snip]
You're right about the context of the processor status save. The only
reason I can think of for modifying the PSW like that would be in a task
switcher of some kind.
--jcMessage
Re: [lpc2000] UART TX FIFO and INTs problem - SOLVED
2004-02-22 by J.C. Wren
Attachments
- No local attachments were found for this message.