Lpc2000

--- In lpc2000@yahoogroups.com, Xtian Xultz <xultz@...> wrote:
>
> Em Qui 02 Fev 2006 06:05, Jaromir Subcik escreveu:
>> According to User Manual, you use lowest possible crystal, but it 
>> may works. Do you set CCO within recommended range 156 to 320MHz? 
>> For desired frequency 50MHz you must output divider adjust to 4 to 
>> keep this CCO range.
> 
> Yes, I am (I think I am).
> My PLL routine is like that:
> 
> SCB_PLLCFG = 0x24;
> SCB_PLLCON = 0x01; 
> SCB_PLLFEED = 0xAA; 
> SCB_PLLFEED = 0x55;
> 
> while(!(SCB_PLLSTAT & 0x00000400))
> 
> SCB_PLLCON = 0x03;
> 
> SCB_PLLFEED = 0xAA;
> SCB_PLLFEED = 0x55;

Ahem, you are repeatedly enabling and connecting the PLL while you 
wait for it to lock.  Try a ; or {} after the while().

Karl Olsen