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Re: [lpc2000] I2C Master Receiving Mode

2006-02-22 by Richard Duits

The next byte is received/transmitted on the I2C bus after you clear the 
SI bit. So if you set/clear AA before or in the same write as the SI bit 
you also can control the ACK in the first byte.

Richard.


andersryl wrote:
> Hi,
>
> I'm writing a driver for the I2C-bus on a LPC2214. The idea is to
> avoid busy waiting and instead use the I2C interrupt for capturing
> events on the I2C-bus. My uC will at all times act as the bus master
> and will transmit as well as receive data.
>
> I have studied
> http://www.semiconductors.philips.com/acrobat/various/8XC552_562OVERV
> IEW_2.pdf for guidance but one thing puzzles me.
>
> In table 4 (page 24) on the row describing 0x50 status code, the
> column stating what has happened on the I2C-bus in order to reach
> the 0x50 "state" must be wrong!
>
> It says: "Data byte has been received; ACK has been returned"
>
> This means that the master has already sent an ACK for the received
> byte from the slave before the interrupt is activated (and the
> status code is set).
>
> Depending on what AA then is set to, the next byte from the slave
> will be Acked/Nacked (transmission stopped). One is hence forced to
> receive at least two bytes since the action after the first byte
> always is "ACK".
>
> My guess is that the document is wrong. The interrupt should occur
> right after the byte has been received and BEFORE the Ack is sent,
> right?
>
> I'm greatful for clarifications regarding this.
>
> /Anders
>
>
>
>
>
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