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Re: [lpc2000] Re: Multiple compare and capture on same Timer

2006-02-24 by Robert Adsett

At 08:05 AM 2/23/06 +0000, gvnn77 wrote:
>--- In lpc2000@yahoogroups.com, "Joel Winarske" <joelw@...> wrote:
> >
> > > I am not able to understand why
> > >
> > > T0MR0 += L_COMPAREMATCH;
> > >
> > > doesn't work!!! I use other micro, such as Texas MSP430, and this
> > > implementation work well! Is there a bug in micro or I have to do
> > > something before read/write T0MR0???
> >
> > Hmm, I'm doing this on a LPC2148 with no problem:
> >
> > T0MR0 += SAMPLE_INTERVAL;
> >
> > Did you check the assembler output?
> >
> >
> > Joel
> >
>
>Source code is:

Have you verified your interrupt latency yet? See my earlier post if not.

Like Joel I'm using similar code w/o any issues.  I really think you need 
to verify that your interrupt latency is reasonable.  If you latency is 
longer than you expect then you will see exactly the behaviour you have 
described.

If you do find out it is unexpectedly long you can determine why but you do 
need to find out if it could be an issue first.  Running off after other 
issues without verifying may just cause you to burn a lot of time to no 
good purpose.  Unless of course you enjoy the frustration ;) but then I 
guess you wouldn't be asking for suggestions.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,   be 
they legal, genetic, or physical.  If you don't believe me, try to chew a 
radio signal. "  -- Kelvin Throop, III
http://www.aeolusdevelopment.com/

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