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RE: [lpc2000] VPBDIV register

2006-02-28 by Joel Winarske

> By the way, there seems to be something odd in the baudrate calculation
> formula given in the LPC214x user manual. The non-fractional part of the
> baudrate is calculated as
> PCLK/(16x(16xU1DLM + U1DLL))
> Instead I would expect something like
> PCLK/(16x(256xU1DLM + U1DLL))
> because U1DLM and U1DLL are 8-bit values.

I referenced errors regarding this equation when I posted my fractional
divider utility a good while back.  There are also some errors in the %error
listing in example table.

The output of correct equation doesn't produce valid results for baud rates
greater than 38400 with PCLK of 3 MHz.  Silicon?  It's not much of a concern
for the LPC214x since core needs to run at minimum 18MHz, but may be an
issue on the LPC2101/2/3.

For those who are not aware my fractional divider utility enumerates every
DLM/DLL/MULVAL/DIVADDVAL register combination to come up with register list
sorted by lowest %error.


Joel

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