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Lpc2000

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RE: [lpc2000] Re: VPBDIV register

2006-03-01 by Joel Winarske

Hi Roger,

> From my reading of pg. 33 of UM LPC214x (below), I concluded the core
> can be driven with minimum frequency FOSC=12 MHz (with M=4 and
> VBPDIV=1 (i.e. pclk=cclk) one gets 48 MHz USB frequency). Am I
> mistaken? Where is the quoted 18 MHz coming from?
> Please advise.

USB peripheral powered off:
10MHz minimum

USB peripheral powered on:
18MHz minimum

Section 14.6.2 in the User Manual:

"
14.6.2 Register Map
The following registers are located in the AHB clock domain. The minimum AHB
clock frequency should be 18 MHz. They can be accessed directly by the CPU.
All registers are 32 bit wide and aligned in the word address boundaries.
USB slave mode registers are located in the address region 0xE009 0000 to
0xE009 004C. All unused address in this region reads “DEADABBA”.
"

Operating current takes a nice jump with PLL1 on.



Joel

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