Lpc2000

Quoting tah2k <tah2k@...>:

> The signals to the processor are exactly what I would expect:
> 1.) The reset line and P0.14 are pulled low by the Philips Flash
> application at t=0.
> 2.) The P0.14 line is held low for about 470mS before being
> released, and the reset is held low for about 820mS before being
> released.
> 3.) After these transitions, the processor sees the 0x3F being
> transmitted by the flash utility.

That sounds like the reset and P0.14 lines are reversed.  P0.14 must be low
coming out of reset.  Something like

Reset ---|____________|---------------

P0.14 ---|______________________|----------

Actually there's no need for P0.14 to go high until you are done but it won't
hurt either way.

See http://www.aeolusdevelopment.com/Articles/InSystemProgramming.html and
http://www.open-research.org.uk/ARMuC/index.cgi?Standard_ISP_Header for some
discussion on how to do this with a standard ISP header.

Robert