Thanks Charles, I look forward to knowing how you go. Can you provide a reference for this AP note for me? I expect my main program to enable the secondary JTAG as well as the small boot program. I would hope that a reset (via jtag or hardware) would start the same code up again and debugging etc would be re-enabled. Thanks also to Robert for his comment on P0.14. I think I certainly will have it poking up out of the resin! I guess I will be finding the intracies of the IAP facility when i start the software side of the project. -- In lpc2000@yahoogroups.com, Owen Mooney <ojm@s...> wrote: >> I have added this question as a separate message as it may attract > > a >> different response >> >> I am debating as t which JTAG pins I use in my circuit layout. I > > can >> spare enough ports for the JTAG lines, but not the trace lines.I >> understand that enabling the primary JTAG lines also enables the > > Trace >> lines. (there seems to be no way to enable the JTAG lines only > > according >> to p206 in the manual). >> >> This suggests using the secondary JTAG lines only. I will probably >> purchase the crossworks compiler largely on price (feed back on > > this >> decision is welcome) >> >> Is it practical to >> 2. layout with only the secondary JTAG "dressed out" >> 2. write a simple program that initialise the secondary JTAG > > ports >> 3. Boot load it and run it. >> 4. develope and debug (including reload programs) entirely from > > the >> secondary JTAG port. >> >> I.e. My question is does the debuging capablity survive all the > > resets etc This is pretty close to what I am planning to do. Indeed there is an app note describing what to do. I have weritten, and will test in the next 24 hours or so, a small configuration firmware. This is loaded in to flash and executes after a reset and configurres the secondary JTAG port then just spins. The JTAG debugger then attaches to the secondary JTAG port. NB though, the debugger should not reset the CPU since that would undo the secondary port set up. You will be limited in where you then load firmware into flash because, obviously, if you overwrite the secondary port configuration code then the pins will no longer be used for JTAG. I'll let you know how it goes... -- Charles ___________________
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Re: Secondary JTag
2004-03-09 by Owen Mooney
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