Lpc2000

I thought this witch hunt was over, but I see it's alive again. 

> In the FAQ you referred to, on "ARM7DTMI-S Core", to the FAQ:
> 
> "Can spurious interrupts occur in the LPC200?",
> 
> Your answer is:
> 
> "Yes, spurious interrupts can occur in any ARM7 device that 
> has implemented the ARM Primecell Vectored Interrupt 
> Controller (VIC)."
> 
> I tried looking for a reference to this in the ARM site but 
> cannot find any.

They might not wish to air this in public.  How about trying to find an
instruction set definition of ARM on the ARM site?

> A search on "spurious" at the ARM web site yields 11 hits but 
> these appear not relevant to the VIC and spurious interrupt 
> problem with the ARM design that you seem to allude us to.

The web is an unreliable research tool.

> I also did a brief search for information on the web relating 
> to spurious interrupts, and all the examples seem to point to 
> LPC one way or another.

See what I mean?

> A spurious interrupt is a hardware interrupt which is 
> generated by system errors 
> (http://www.answers.com/topic/interrupt-1), and systems with 
> spurious interrupts in general do not meet compliance requirements.

Ok, so there exists at least one definition on at least one page of at
least one web site that matches with your requirement of what "spurious
interrupt" means.  In the case cited by Philips, the spurious interrupt
does not stem from system errors, there is a specific issue in the
ARM7TDMI-S which has been given the nomenclature "spurious interrupt"
for want of a better name.

> Please clarify:
> 
> 1/  Is this spurious interrupt problem an error in LPC 
> implementation of VIC or is it an error in ARM Primecell VIC 
> specifications itself?

It is an issue when interrupts are disabled asynchronously to the
interrupt source which then raises an interrupt.  The interrupt is
disabled, but the IRQ is taken.

> 2/  Can you tell us if there are any other ARM cores with VIC 
> that also suffer from spurious interrupts problem that the 
> LPC suffers from?

Why should Robert do your research on other processors?

It is not just the VIC.  The AT91SAM7 suffers the same with the AIC and
the MAC7100 with the INTC.

Don't believe me?  I wouldn't:

http://www.freescale.com/files/32bit/doc/app_note/AN2891.pdf

http://www.atmel.com/dyn/resources/prod_documents/DOC1156.PDF

> PS:  I realise there has been discussion previously on 
> spurious interrupts, but none seem to throw any light on 
> whether this is a problem specific to LPC or it has to do 
> with with ARM VIC design itself.

Who cares?  The issue is well understood and the workaround easy.

--
Paul Curtis, Rowley Associates Ltd   http://www.rowley.co.uk 
CrossWorks for MSP430, ARM, AVR and now MAXQ processors