Lpc2000

For whatever reason

http://www.arm.com/support/faqip/3677.html

doesn't show any more.

This problem (disabling an interrupt as it occurs) affects all 
ARM7TDMI's - the workarounds are (were) well documented.

Regards
Michael

>--- In lpc2000@yahoogroups.com, "roger_lynx" <roger_lynx@...> wrote:
> > >They however do not have to deal with spurious interrupts as a
> > >consequence.  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> >
> > Hi Jayasooriah,
> >
> > Oh?
> > On ARM core with PL 190 VIC, not dealing with this consequence is a
> > "blissful ignorance", IMHO.
>
>In the OS that I run on many architectures and platforms (including ARM 
>variants) spurious interrupts trigger a kernel panic.  It signals system 
>failure. This behaviour of the OS is for compliance purposes.
>
>Clearly it will not be certified to run on LPC because you can get spurious 
>interrupts that (according to FAQ/AN) are not indication that there is a 
>system failure.
>
> > Read this FAQ first: http://www.arm.com/support/faqip/3677.html
> > This is the original source. Philips included this info in their
> > latest LPC2148 UM, very helpful.
>
>Sorry, wrong reference me thinks.  This is not a spurious interrupt 
>problem.  It deals with interrupts being locked out because of race conditions.
>
>There are well documented methods of dealing with this without having to 
>allow for spurious interrupts.  Besides, this is not an indication of 
>system failure.
>
> > > This begs the question: is this erroneous behaviour LPC specific, or
> > does
> > > it affect any other (all?) ARM VIC implementations?
> >
> > ARM's VIC Prime Cell PL 190, see document "ARM DDI 0181C", and Errata
> > 01.This document can be found on www.arm.com.
>
>Where this document does it deal with spurious interrupts?
>
> > LPC 2000 is an ARMv4T (ATM7) with VIC PL190. This mis-behavior is
> > specific to ARM7 core(according to ARM).
> > There are other interrupt controllers for ARM7-based MCUs (Atmel,
> > Freescale, ST, etc.). I do not know how they address this
> > architectural flaw of spurious interrupts. I'd like to know.
>
>I would like to know too ... if they suffer from spurious interrupt problem 
>that the LPC does.
>
> > > The AN suggests the latter is the case but I cannot find any
> > documentation
> > > relating to ARM Primecell VIC specifications that supports this.
> >                                                ^^^^^^^^^^^^^^^^^^
> > What do you mean by "that supports this"?
>
>I meant "supports this claim by Philips that ARM7-TDIM with VIC suffers 
>from spurious interrupts".
>
> > After reading 'this': http://www.arm.com/support/faqip/3677.html,
> > 'that' becomes clearer.
> > ;-)
>
>Not quite Roger.  The issue with reentrant ISRs is well known, but spurious 
>interrupt is something quite different.
>
> > Take care.
> >
> > Roger
>
>You too :)
>
>Jaya
>
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