Lpc2000

At 06:44 PM 3/11/04 +0100, you wrote:
>I only can make the timer-interrupt work (the only interrupt at this time)
>when
>the I-bit (interrupt disable bit) of the CPSR is cleared each time at the
>end of the timer-ISR.
>What could be the reason that the I-bit is re-set after each interrupt?
>Does my debugger (Nohau) has something to do with it?
>
>/***************************************************************************
>***/
>void Timer_OnInterrupt()
>/***************************************************************************
>***/
>{
>// clear interrupt flag on peripheral level
>// At this moment, only one interrupt source (MR0) is used
>LPC21xx_T0IR |= 0x01;   // clear MR0 Interrupt
>
>LPC21xx_VICSoftIntClear = IRQ_TIMER_0; // bit 4 = Timer0
>
>// test output 1
>Output_Set      (PORT_0);
>Output_Clear    (PORT_0);
>
>// Always leave this at the end of ISR
>// Update priority hardware
>LPC21xx_VICVectAddr = 0x00000000;
>
>// Need to re-clear I-bit, so interrupts keep working !
>  __asm__("mrs r0, cpsr");
>  __asm__("bic r0, r0, #0x80");
>  __asm__("msr cpsr, r0");
>
>}

A couple of questions:

1- What its your compiler?
2- Where is your interrupt prologue and epilogue (may be related to Q1)?

Robert


>Thanks,
>
>Pascal Degryze
>PDG@...
>R&D department
>
>Traficon n.v.
>Meensesteenweg 449, bus 2
>B-8501 Bissegem
>Belgium
>Tel: +32(0)56/37 22 00
>Fax: +32(0)56/37 21 96
>http://www.Traficon.com
>
>
>
>
>
>
>
>
>Yahoo! Groups Links
>
>
>
>

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III