Lpc2000

Hello,

Arising out of requests from a number of people, I have documented the root 
cause of spurious interrupts on LPC based on my experiments with LPC2292 as 
I see it.  You can find this document (in progress) at:

   http://www.cse.unsw.edu.au/~jayas/esdk/lpc2/spurious-irq.html

The root cause of these spurious interrupts does not lie in the interaction 
of the ARM core with VIC as claimed by Philips.  Hence it is unlikely that 
other ARM cores with VIC will suffer the these spurious interrupt problems.

The root cause of spurious interrupts generated when VICINTCLEAR is used to 
disable interrupts is the internal priority logic of the VIC as implemented 
on the LPCs.

The root cause of spurious interrupts generated through interaction of RDA 
and CTI for UART0/1 is the internal logic within these peripheral devices.

I have not got around to documenting hazards arising out of work-arounds as 
suggested in AN10414.

However, given the framework I have described for creating these spurious 
interrupts in a deterministic way, it is not hard for anyone to extend the 
experiments to find out exactly what happens and work out strategies of 
preventing them.

For starters, I would not recommend anyone disable interrupts using the 
VIC.  Use the F and I bits in CPSR instead.  They are there for this 
purpose and they do not generate spurious interrupts.

Kind regards,

Jaya

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