Hello everyone, On 8 december 2005, Brendan Murphy posted a report where switching a pin from GPIO to EINT (external interrupt) caused an edge-triggered interrupt (message http://groups.yahoo.com/group/lpc2000/message/11212). I replied to that message saying that we encountered precisely that error on a single PCB out of 20 that we tested. Our hypothesis was that the particular PCB had some kind of defect. This hypothesis was based on the fact that the spurious interrupts _disappeared_ when slightly bending the PCB. We recently encountered a second board with exactly the same problem. Here, too, pressure on the board influenced the occurrence of spurious interrupts. Also similar was that the "pressure point" was on the processor. In a related test, we heated the processor. This also influenced the occurrence of the spurious interrupts. We replaced the processor on the board (an LPC2138) by another one. No more spurious interrupts occurred. We are wondering whether this issue may perhaps be caused by the processors not being handled correctly during manufacturing (perhaps there was no baking before reflow soldering). We have also tried to implement simple work-arounds, such as disabling the external interrupt in the VIC before switching the pin from GPIO to EINT, or clearing the interrupt in the VIC immediately after the switch. Both these attempts failed. I am reporting this to retract my earlier statement that the probable cause is in the PCB or in the PCB design. In addition, I am curious whether anyone can think of a work-around or fix for this issue. Kind regards, Thiadmer Riemersma
Message
CONFIRMED: WARNING: problem reading state of external interrupt lines.
2006-03-22 by Thiadmer Riemersma (ITB CompuPhase)
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